Kangmin Hu

Publication Activity (10 Years)

Years Active: 2008-2023
Publications (10 Years): 3

Top Topics

Top Venues

IEEE J. Solid State Circuits

Publications

Zhaozhi Long, Feng Zhou, Fuchang Lin, Jiawei Fan, Wenting Li, Yinglong Diao, Kangmin Hu
Development of a Wideband Precision Electric Field Measuring Sensor. Sensors 23 (23) (2023)
Kangmin Hu, Julie R. Hu, Brian Otis, Patrick Yin Chiang
A 1.575GHz, 1.63mW CMOS Injection-Locked Ring Oscillator Powered by FBAR-Based PLL Reference. ISCAS (2020)
Jun Cao, Delong Cui, Ali Nazemi, Tim He, Guansheng Li, Burak Çatli, Mehdi Khanpour, Kangmin Hu, Tamer A. Ali, Heng Zhang, Hairong Yu, Ben Rhew, Shiwei Sheng, Yonghyun Shim, Bo Zhang, Afshin Momtaz
29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS. ISSCC (2017)
Bo Zhang, Karapet Khanoyan, Hamid Hatamkhani, Haitao Tong, Kangmin Hu, Siavash Fallahi, Mohammed M. Abdul-Latif, Kambiz Vakilian, Ichiro Fujimori, Anthony Brewster
A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS. IEEE J. Solid State Circuits 50 (12) (2015)
Bo Zhang, Karapet Khanoyan, Hamid Hatamkhani, Haitao Tong, Kangmin Hu, Siavash Fallahi, Kambiz Vakilian, Anthony Brewster
3.1 A 28Gb/s multi-standard serial-link transceiver for backplane applications in 28nm CMOS. ISSCC (2015)
Ali Nazemi, Kangmin Hu, Burak Çatli, Delong Cui, Ullas Singh, Tim He, Zhi Chao Huang, Bo Zhang, Afshin Momtaz, Jun Cao
3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS. ISSCC (2015)
Young-Hoon Song, Rui Bai, Kangmin Hu, Noah Hae-Woong Yang, Patrick Yin Chiang, Samuel Palermo
A 0.47-0.66 pJ/bit, 4.8-8 Gb/s I/O Transceiver in 65 nm CMOS. IEEE J. Solid State Circuits 48 (5) (2013)
Kangmin Hu, Rui Bai, Tao Jiang, Chao Ma, Ahmed Ragab, Samuel Palermo, Patrick Yin Chiang
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking. IEEE J. Solid State Circuits 47 (8) (2012)
Kangmin Hu, Larry Wu, Patrick Yin Chiang
A Comparative Study of 20-Gb/s NRZ and Duobinary Signaling Using Statistical Analysis. IEEE Trans. Very Large Scale Integr. Syst. 20 (7) (2012)
Tao Jiang, Wing Liu, Freeman Y. Zhong, Charlie Zhong, Kangmin Hu, Patrick Yin Chiang
A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS. IEEE J. Solid State Circuits 47 (10) (2012)
Tao Jiang, Kangmin Hu, Patrick Yin Chiang
A low-power, capacitively-divided, ring oscillator with digitally adjustable voltage swing. VLSI-DAT (2012)
Kangmin Hu, Tao Jiang, Samuel Palermo, Patrick Yin Chiang
Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS. CICC (2011)
Changhui Hu, Rahul Khanna, Jay J. Nejedlo, Kangmin Hu, Huaping Liu, Patrick Yin Chiang
A 90 nm-CMOS, 500 Mbps, 3-5 GHz Fully-Integrated IR-UWB Transceiver With Multipath Equalization Using Pulse Injection-Locking for Receiver Phase Synchronization. IEEE J. Solid State Circuits 46 (5) (2011)
Ahmed Ragab, Yang Liu, Kangmin Hu, Patrick Chiang, Samuel Palermo
Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links. J. Electr. Comput. Eng. 2011 (2011)
Kangmin Hu, Tao Jiang, Jingguang Wang, Frank O'Mahony, Patrick Yin Chiang
A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS. IEEE J. Solid State Circuits 45 (4) (2010)
Kangmin Hu, Tao Jiang, Patrick Chiang
Comparison of On-die Global Clock Distribution Methods for Parallel Serial Links. ISCAS (2009)
Feng Zhao, Xiaoping Gao, Huajiang Zhang, Kangmin Hu, Zhiliang Hong
A CMOS 434/868 MHz FSK/OOK transmitter with integrated fractional-N PLL. APCCAS (2008)