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Tao Jiang
Publication Activity (10 Years)
Years Active: 2009-2012
Publications (10 Years): 0
Top Topics
Wireless Transmission
Entropy Coding
Power Dissipation
High Speed
Top Venues
IEEE J. Solid State Circuits
VLSI-DAT
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Publications
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Kangmin Hu
,
Rui Bai
,
Tao Jiang
,
Chao Ma
,
Ahmed Ragab
,
Samuel Palermo
,
Patrick Yin Chiang
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking.
IEEE J. Solid State Circuits
47 (8) (2012)
Tao Jiang
,
Wing Liu
,
Freeman Y. Zhong
,
Charlie Zhong
,
Kangmin Hu
,
Patrick Yin Chiang
A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS.
IEEE J. Solid State Circuits
47 (10) (2012)
Tao Jiang
,
Kangmin Hu
,
Patrick Yin Chiang
A low-power, capacitively-divided, ring oscillator with digitally adjustable voltage swing.
VLSI-DAT
(2012)
Kangmin Hu
,
Tao Jiang
,
Samuel Palermo
,
Patrick Yin Chiang
Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS.
CICC
(2011)
Tao Jiang
,
Wing Liu
,
Freeman Y. Zhong
,
Charlie Zhong
,
Patrick Yin Chiang
Single-channel, 1.25-GS/s, 6-bit, loop-unrolled asynchronous SAR-ADC in 40nm-CMOS.
CICC
(2010)
Kangmin Hu
,
Tao Jiang
,
Jingguang Wang
,
Frank O'Mahony
,
Patrick Yin Chiang
A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS.
IEEE J. Solid State Circuits
45 (4) (2010)
Tao Jiang
,
Patrick Yin Chiang
Sense Amplifier Power and Delay Characterization for Operation under Low-Vdd and Low-voltage Clock Swing.
ISCAS
(2009)
Kangmin Hu
,
Tao Jiang
,
Patrick Chiang
Comparison of On-die Global Clock Distribution Methods for Parallel Serial Links.
ISCAS
(2009)