Adesh Garg

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 2

Top Topics

Metal Oxide Semiconductor

Top Venues

IEEE J. Solid State Circuits

Publications

Guansheng Li, Adesh Garg, Tim He, Ullas Singh, Jiawen Zhang, Lakshmi P. Rao, Chang Liu, Meisam Honarvar Nazari, Yang Liu, Yong Liu, Heng Zhang, Tamer A. Ali, Hyo-Gyuem Rhew, Jiayoon Ru, Delong Cui, Ali Nazemi, Bo Zhang, Afshin Momtaz, Jun Cao
18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOS. ISSCC (2024)
Namik Kocaman, Ullas Singh, Bharath Raghavan, Arvindh Iyer, Kumar Thasari, Saurabh Surana, Jun Won Jung, Jaehun Jeong, Heng Zhang, Anand Vasani, Yonghyun Shim, Zhi Huang, Adesh Garg, Hsiang-bin Lee, Bo Wu, Feifei Liu, Ray Wang, Matthew Loh, Alex Wang, Mario Caresosa, Bo Zhang, Afshin Momtaz
An 182mW 1-60Gb/s Configurable PAM-4/NRZ Transceiver for Large Scale ASIC Integration in 7nm FinFET Technology. ISSCC (2022)
Bo Zhang, Ali Nazemi, Adesh Garg, Namik Kocaman, Mahmoud Reza Ahmadi, Mehdi Khanpour, Heng Zhang, Jun Cao, Afshin Momtaz
A 40 nm CMOS 195 mW/55 mW Dual-Path Receiver AFE for Multi-Standard 8.5-11.5 Gb/s Serial Links. IEEE J. Solid State Circuits 50 (2) (2015)
Adesh Garg, Ullas Singh, Nick Huang, Wayne Wong, Bin Liu, Zhi Chao Huang, Afshin Momtaz, Jun Cao
A quad-channel 112-128 Gb/s coherent transmitter in 40 nm CMOS. VLSIC (2014)
Ullas Singh, Adesh Garg, Bharath Raghavan, Nick Huang, Heng Zhang, Zhi Huang, Afshin Momtaz, Jun Cao
2.2 A 780mW 4×28Gb/s transceiver for 100GbE gearbox PHY in 40nm CMOS. ISSCC (2014)
Ullas Singh, Adesh Garg, Bharath Raghavan, Nick Huang, Heng Zhang, Zhi Chao Huang, Afshin Momtaz, Jun Cao
A 780 mW 4 × 28 Gb/s Transceiver for 100 GbE Gearbox PHY in 40 nm CMOS. IEEE J. Solid State Circuits 49 (12) (2014)
Michael Boers, Iason Vassiliou, Saikat Sarkar, Sean T. Nicolson, Ehsan Adabi, Bagher Afshar, Bevin G. Perumana, Theodoros Chalvatzis, Spyros Kavadias, Padmanava Sen, Wei Liat Chan, Alvin Hsing-Ting Yu, Ali Parsa, Med Nariman, Seunghwan Yoon, Alfred Grau Besoli, Chryssoula A. Kyriazidou, Gerasimos Zochios, Namik Kocaman, Adesh Garg, Hans Eberhart, Phil Yang, Hongyu Xie, Hea Joung Kim, Alireza Tarighat Mehrabani, David Garrett, Andrew J. Blanksby, Mong Kuan Wong, Durai Pandian Thirupathi, Siukai Mak, Radha Srinivasan, Amir Ibrahim, Ersin Sengul, Vincent Roussel, Po-Chao Huang, Tsuifang Yeh, Murat Mese, Jesus A. Castaneda, Brima Ibrahim, Tirdad Sowlati, Maryam Rofougaran, Ahmadreza Rofougaran
20.2 A 16TX/16RX 60GHz 802.11ad chipset with single coaxial interface and polarization diversity. ISSCC (2014)
Bo Zhang, Ali Nazemi, Adesh Garg, Namik Kocaman, Mahmoud Reza Ahmadi, Mehdi Khanpour, Heng Zhang, Jun Cao, Afshin Momtaz
A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS. ISSCC (2013)
Namik Kocaman, Adesh Garg, Bharath Raghavan, Delong Cui, Anand Vasani, Keith Tang, Deyi Pi, Haitao Tong, Siavash Fallahi, Wei Zhang, Ullas Singh, Jun Cao, Bo Zhang, Afshin Momtaz
11.3 Gbps CMOS SONET Compliant Transceiver for Both RZ and NRZ Applications. IEEE J. Solid State Circuits 46 (12) (2011)
Namik Kocaman, Adesh Garg, Bharath Raghavan, Delong Cui, Anand Vasani, Keith Tang, Deyi Pi, Haitao Tong, Siavash Fallahi, Wei Zhang, Ullas Singh, Jun Cao, Bo Zhang, Afshin Momtaz
11.3Gb/s CMOS SONET-compliant transceiver for both RZ and NRZ applications. ISSCC (2011)
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, Anand Vasani, Adesh Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Bharath Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber. IEEE J. Solid State Circuits 45 (6) (2010)
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, Anand Vasani, Adesh Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Bharath Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber. ISSCC (2009)
Adesh Garg, Anthony Chan Carusone, Sorin P. Voinigescu
A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-$muhbox m$SiGe BiCMOS Technology. IEEE J. Solid State Circuits 41 (10) (2006)
Adesh Garg, Ian Steiner, Graham A. Jullien, James W. Haslett, G. H. McGibney
A high speed complex adaptive filter for an asymmetric wireless LAN using a new quantized polynomial representation. ISCAS (2) (2003)