Bharath Raghavan

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 4

Top Topics

Massively Parallel

Ultra Low Power

Top Venues

J. Chem. Inf. Model.

IEEE J. Solid State Circuits

Publications

Bharath Raghavan, Mirko Paulikat, Katya Ahmad, Lara Callea, Andrea Rizzi, Emiliano Ippoliti, Davide Mandelli, Laura Bonati, Marco de Vivo, Paolo Carloni
Drug Design in the Exascale Era: A Perspective from Massively Parallel QM/MM Simulations. J. Chem. Inf. Model. 63 (12) (2023)
Bharath Raghavan, Florian K. Schackert, Andrea Levy, Sophia K. Johnson, Emiliano Ippoliti, Davide Mandelli, Jógvan Magnus Haugaard Olsen, Ursula Rothlisberger, Paolo Carloni
MiMiCPy: An Efficient Toolkit for MiMiC-Based QM/MM Simulations. J. Chem. Inf. Model. 63 (5) (2023)
Namik Kocaman, Ullas Singh, Bharath Raghavan, Arvindh Iyer, Kumar Thasari, Saurabh Surana, Jun Won Jung, Jaehun Jeong, Heng Zhang, Anand Vasani, Yonghyun Shim, Zhi Huang, Adesh Garg, Hsiang-bin Lee, Bo Wu, Feifei Liu, Ray Wang, Matthew Loh, Alex Wang, Mario Caresosa, Bo Zhang, Afshin Momtaz
An 182mW 1-60Gb/s Configurable PAM-4/NRZ Transceiver for Large Scale ASIC Integration in 7nm FinFET Technology. ISSCC (2022)
Bharath Raghavan, Aida Varzaghani, Lakshmi P. Rao, Henry Park, Xiaochen Yang, Zhi Huang, Yu Chen, Rama Kattamuri, Chunhui Wu, Bo Zhang, Jun Cao, Afshin Momtaz, Namik Kocaman
A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit ADC/5-tap DFE receiver and a 4-tap FFE transmitter in 28 nm CMOS. VLSI Circuits (2016)
Ullas Singh, Adesh Garg, Bharath Raghavan, Nick Huang, Heng Zhang, Zhi Huang, Afshin Momtaz, Jun Cao
2.2 A 780mW 4×28Gb/s transceiver for 100GbE gearbox PHY in 40nm CMOS. ISSCC (2014)
Ullas Singh, Adesh Garg, Bharath Raghavan, Nick Huang, Heng Zhang, Zhi Chao Huang, Afshin Momtaz, Jun Cao
A 780 mW 4 × 28 Gb/s Transceiver for 100 GbE Gearbox PHY in 40 nm CMOS. IEEE J. Solid State Circuits 49 (12) (2014)
Bharath Raghavan, Delong Cui, Ullas Singh, Hassan Maarefi, Dave Pi, Anand Vasani, Zhi Chao Huang, Afshin Momtaz, Jun Cao
A sub-2W 39.8-to-44.6Gb/s transmitter and receiver chipset with SFI-5.2 interface in 40nm CMOS. ISSCC (2013)
Bharath Raghavan, Delong Cui, Ullas Singh, Hassan Maarefi, Deyi Pi, Anand Vasani, Zhi Chao Huang, Burak Çatli, Afshin Momtaz, Jun Cao
A Sub-2 W 39.8-44.6 Gb/s Transmitter and Receiver Chipset With SFI-5.2 Interface in 40 nm CMOS. IEEE J. Solid State Circuits 48 (12) (2013)
Delong Cui, Bharath Raghavan, Ullas Singh, Anand Vasani, Zhi Chao Huang, Deyi Pi, Mehdi Khanpour, Ali Nazemi, Hassan Maarefi, Tamer A. Ali, Nick Huang, Wei Zhang, Bo Zhang, Afshin Momtaz, Jun Cao
A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission. ISSCC (2012)
Delong Cui, Bharath Raghavan, Ullas Singh, Anand Vasani, Zhi Chao Huang, Deyi Pi, Mehdi Khanpour, Ali Nazemi, Hassan Maarefi, Wei Zhang, Tamer A. Ali, Nick Huang, Bo Zhang, Afshin Momtaz, Jun Cao
A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission. IEEE J. Solid State Circuits 47 (12) (2012)
Namik Kocaman, Adesh Garg, Bharath Raghavan, Delong Cui, Anand Vasani, Keith Tang, Deyi Pi, Haitao Tong, Siavash Fallahi, Wei Zhang, Ullas Singh, Jun Cao, Bo Zhang, Afshin Momtaz
11.3 Gbps CMOS SONET Compliant Transceiver for Both RZ and NRZ Applications. IEEE J. Solid State Circuits 46 (12) (2011)
Namik Kocaman, Adesh Garg, Bharath Raghavan, Delong Cui, Anand Vasani, Keith Tang, Deyi Pi, Haitao Tong, Siavash Fallahi, Wei Zhang, Ullas Singh, Jun Cao, Bo Zhang, Afshin Momtaz
11.3Gb/s CMOS SONET-compliant transceiver for both RZ and NRZ applications. ISSCC (2011)
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, Anand Vasani, Adesh Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Bharath Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber. IEEE J. Solid State Circuits 45 (6) (2010)
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, Anand Vasani, Adesh Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Bharath Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber. ISSCC (2009)