Login / Signup
Amrutha Iyer
Publication Activity (10 Years)
Years Active: 2016-2017
Publications (10 Years): 2
Top Topics
Low Cost
Clock Gating
Np Complete
Web Applications
Top Venues
ISSCC
IEEE J. Solid State Circuits
</>
Publications
</>
Fazil Ahmad
,
Greg Unruh
,
Amrutha Iyer
,
Pin-En Su
,
Sherif Abdalla
,
Bo Shen
,
Mark Chambers
,
Ichiro Fujimori
A 0.5-9.5-GHz, 1.2-µs Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling.
IEEE J. Solid State Circuits
52 (1) (2017)
Fazil Ahmad
,
Greg Unruh
,
Amrutha Iyer
,
Pin-En Su
,
Sherif Abdalla
,
Bo Shen
,
Mark Chambers
,
Ichiro Fujimori
19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC.
ISSCC
(2016)