Harry Hsieh

Publication Activity (10 Years)

Years Active: 1994-2009
Publications (10 Years): 0

Publications

Eric Cheung, Harry Hsieh, Felice Balarin
Memory subsystem simulation in software TLM/T models. ASP-DAC (2009)
Eric Cheung, Xi Chen, Harry Hsieh, Abhijit Davare, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe
Runtime deadlock analysis for system level design. Des. Autom. Embed. Syst. 13 (4) (2009)
Eric Cheung, Harry Hsieh, Felice Balarin
Partial order method for timed simulation of system-level MPSoC designs. ASP-DAC (2009)
Eric Cheung, Harry Hsieh, Felice Balarin
Fast and accurate performance simulation of embedded software for MPSoC. ASP-DAC (2009)
Eric Cheung, Harry Hsieh, Felice Balarin
Software optimization for MPSoC: a mpeg-2 decoder case study. CODES+ISSS (2008)
Eric Cheung, Harry Hsieh, Felice Balarin
Automatic buffer sizing for rate-constrained KPN applications on multiprocessor system-on-chip. HLDVT (2007)
Eric Cheung, Harry Hsieh, Felice Balarin
Framework for fast and accurate performance simulation of multiprocessor systems. HLDVT (2007)
Eric Cheung, Xi Chen, Fur-Shing Tsai, Yu-Chin Hsu, Harry Hsieh
Bridging RTL and gate: correlating different levels of abstraction for design debugging. HLDVT (2007)
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
Assertion-Based Design Exploration of DVS in Network Processor Architectures CoRR (2007)
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
System Synthesis for Networks of Programmable Blocks CoRR (2007)
Xi Chen, Harry Hsieh, Felice Balarin
Verification Approach of Metropolis Design Framework for Embedded Systems. Int. J. Parallel Program. 34 (1) (2006)
Eric Cheung, Piyush Satapathy, Vi Pham, Harry Hsieh, Xi Chen
Runtime Deadlock Analysis of SystemC Designs. HLDVT (2006)
Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli
Communication and co-simulation infrastructure for heterogeneous system integration. DATE (2006)
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
System Synthesis for Networks of Programmable Blocks. DATE (2005)
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
Assertion-Based Design Exploration of DVS in Network Processor Architectures. DATE (2005)
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe
Simulation based deadlock analysis for system level designs. DAC (2005)
Susan Cotterell, Ryan Mannion, Frank Vahid, Harry Hsieh
eBlocks - an enabling technology for basic sensor based systems. IPSN (2005)
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Logic of constraints: a quantitative performance and functional constraint formalism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (8) (2004)
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Felice Balarin
Utilizing Formal Assertions for System Design of Network Processors. DATE (2004)
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Felice Balarin
Assertion Based Verification and Analysis of Network Processor Architectures. Des. Autom. Embed. Syst. 9 (3) (2004)
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
Assertion-based power/performance analysis of network processor architectures. HLDVT (2004)
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula. DATE (2003)
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Verifying LOC based functional and performance constraints. HLDVT (2003)
Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli
Metropolis: An Integrated Electronic System Design Environment. Computer 36 (4) (2003)
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Formal Verification for Embedded System Designs. Des. Autom. Embed. Syst. 8 (2-3) (2003)
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Automatic trace analysis for logic of constraints. DAC (2003)
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Case Studies of Model Checking for Embedded System Designs. ACSD (2003)
Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh
First results with eBlocks: embedded systems building blocks. CODES+ISSS (2003)
Xi Chen, Fang Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe
Formal verification of embedded system designs at multiple levels of abstraction. HLDVT (2002)
Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
Synchronous approach to the functional equivalence of embeddedsystem implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (8) (2001)
Harry Hsieh, Felice Balarin
Refining abstract equivalence analysis for embedded system design. HLDVT (2000)
Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
Efficient methods for embedded system design space exploration. DAC (2000)
Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki
Synthesis of software programs for embedded control applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (6) (1999)
Harry Hsieh, Felice Balarin
Synchronous equivalence for embedded systems: a tool for design exploration. ICCAD (1999)
Harry Hsieh, Alberto L. Sangiovanni-Vincentelli
Modeling micro-controller peripherals for high-level co-simulation and synthesis. CODES (1997)
Massimiliano Chiodo, Daniel W. Engels, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli
A case study in computer-aided co-design of embedded controllers. Des. Autom. Embed. Syst. 1 (1-2) (1996)
Felice Balarin, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
Formal Verification of Embedded Systems based on CFSM Networks. DAC (1996)
Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich
Synthesis of Software Programs for Embedded Control Applications. DAC (1995)
Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno
Hardware-software codesign of embedded systems. IEEE Micro 14 (4) (1994)
Luciano Lavagno, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, S. Yee, Alberto L. Sangiovanni-Vincentelli, Kei Suzuki
A case study in computer-aided codesign of embedded controllers. CODES (1994)