Guan-Ying Huang

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 2

Top Topics

Analog To Digital Converter

Top Venues

Future Gener. Comput. Syst.

Publications

Guan-Ying Huang, Ching-Hung Lee
Industrial federated learning algorithm (P-PFedSGD) for tool wear estimation. Future Gener. Comput. Syst. 158 (2024)
Guan-Ying Huang, Ching-Hung Lee
Federated Learning Architecture for Bearing Fault Diagnosis. ICSSE (2021)
Cheng-Hsun Ho, Soon-Jyh Chang, Guan-Ying Huang, Che-Hsun Kuo
A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. ISCAS (2014)
Kai-Hsiang Chiang, Soon-Jyh Chang, Guan-Ying Huang, Ying-Zu Lin
A 10b 100kS/s SAR ADC with charge recycling switching method. A-SSCC (2014)
Jia-Jhang Wu, Soon-Jyh Chang, Sheng-Hsiung Lin, Chun-Po Huang, Guan-Ying Huang
Low power pipelined SAR ADC with loading-free architecture. VLSI-DAT (2014)
Ying-Zu Lin, Chun-Cheng Liu, Guan-Ying Huang, Ya-Ting Shyu, Yen-Ting Liu, Soon-Jyh Chang
A 9-Bit 150-MS/s Subrange ADC Based on SAR Architecture in 90-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2013)
Guan-Ying Huang, Soon-Jyh Chang, Chun-Cheng Liu, Ying-Zu Lin
10-bit 30-MS/s SAR ADC Using a Switchback Switching Method. IEEE Trans. Very Large Scale Integr. Syst. 21 (3) (2013)
Ting-Zi Chen, Soon-Jyh Chang, Guan-Ying Huang
A successive approximation ADC with resistor-capacitor hybrid structure. VLSI-DAT (2013)
Sheng-Hsiung Lin, Jin-Fu Lin, Guan-Ying Huang, Soon-Jyh Chang
A pipelined SAR ADC with loading-separating technique in 90-nm CMOS technology. APCCAS (2012)
Ya-Ting Shyu, Ying-Zu Lin, Rong-Sing Chu, Guan-Ying Huang, Soon-Jyh Chang
A Low-Cost Bit-Error-Rate BIST Circuit for High-Speed ADCs Based on Gray Coding. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2012)
Chun-Po Huang, Soon-Jyh Chang, Guan-Ying Huang, Cheng-Wu Lin
A power-efficient sizing methodology of SAR ADCs. ISCAS (2012)
Guan-Ying Huang, Soon-Jyh Chang, Chun-Cheng Liu, Ying-Zu Lin
A 1-µW 10-bit 200-kS/s SAR ADC With a Bypass Window for Biomedical Applications. IEEE J. Solid State Circuits 47 (11) (2012)
Jing Chen, Da-Wei Chang, Chung-Ping Young, Guan-Ying Huang, Su-Lin Chu, Chung-Yuan Ke, Shih-Tun Yen, Tsang-Shuo Kuo
Building a Multi-kernel Embedded System with High Performance IPC Mechanism. HPCC (2011)
Ying-Zu Lin, Soon-Jyh Chang, Ya-Ting Shyu, Guan-Ying Huang, Chun-Cheng Liu
A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS. A-SSCC (2011)
Ying-Zu Lin, Soon-Jyh Chang, Yen-Ting Liu, Chun-Cheng Liu, Guan-Ying Huang
An Asynchronous Binary-Search ADC Architecture With a Reduced Comparator Count. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2010)
Jing Chen, Chung-Ping Young, Da-Wei Chang, Guan-Ying Huang, Chung-Yuan Ke, Shih-Tun Yen, Tsang-Shuo Kuo
Building Multi-kernel Embedded System on PAC Multi-core Platform. QSIC (2010)
Chun-Cheng Liu, Soon-Jyh Chang, Guan-Ying Huang, Ying-Zu Lin, Chung-Ming Huang, Chih-Hao Huang, Linkai Bu, Chih-Chung Tsai
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation. ISSCC (2010)
Chun-Cheng Liu, Soon-Jyh Chang, Guan-Ying Huang, Ying-Zu Lin
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure. IEEE J. Solid State Circuits 45 (4) (2010)
Ying-Zu Lin, Soon-Jyh Chang, Yen-Ting Liu, Chun-Cheng Liu, Guan-Ying Huang
A 5b 800MS/s 2mW asynchronous binary-search ADC in 65nm CMOS. ISSCC (2009)