Giacomo Buonanno

Publication Activity (10 Years)

Years Active: 1990-2021
Publications (10 Years): 1

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Publications

Angela Locoro, Paolo Buono, Giacomo Buonanno
Interacting with More Than One Chart: What Is It All About? INTERACT (5) (2021)
Federico Pigni, Aurelio Ravarini, Giacomo Buonanno, Donatella Sciuto
Interorganisational systems within SMEs aggregations: an exploratory study on information requirements of an industrial district. Int. J. Inf. Technol. Manag. 10 (2/3/4) (2011)
Paolo Faverio, Donatella Sciuto, Giacomo Buonanno
Using Critical Success Factors for Assessing Critical Activities in ERP Implementation within SMEs. ICEIS (1) (2005)
Giacomo Buonanno, Paolo Faverio, Federico Pigni, Aurelio Ravarini, Donatella Sciuto, Marco Tagliavini
Factors affecting ERP system adoption: A comparative analysis between SMEs and large companies. J. Enterp. Inf. Manag. 18 (4) (2005)
Giacomo Buonanno, Federico Pigni, Aurelio Ravarini, Donatella Sciuto
Exploring the Role of Inter-Organizational Information Systems within SMEs Aggregations. Bled eConference (2005)
Giacomo Buonanno, Stefano Gramignoli, Aurelio Ravarini, Marco Tagliavini, Donatella Sciuto
ICT diffusion and strategic role within Italian SMEs. IRMA Conference (2000)
Giacomo Buonanno, Franco Fummi, Donatella Sciuto
An extended-UIO-based method for protocol conformance testing. J. Syst. Archit. 46 (3) (2000)
Giacomo Buonanno, Mariagiovanna Sami
Co-Testing: Granting Testability in a Codesign Environment. Integr. Comput. Aided Eng. 5 (1) (1998)
Marco Broglia, Giacomo Buonanno, Mariagiovanna Sami, M. Selvini
Designing for Yield: A Defect-Tolerant Approach to High-Level Synthesis. DFT (1998)
M. Bacis, Giacomo Buonanno, Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto
Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. ICCD (1997)
Cristiana Bolchini, Giacomo Buonanno, M. Cozzini, Donatella Sciuto, Renato Stefanelli
Designing Ad-Hoc Codes for the Realization of Fault Tolerant CMOS Networks. DFT (1997)
Giacomo Buonanno, M. Pugassi, Mariagiovanna Sami
A high-level synthesis approach to design of fault-tolerant systems. VTS (1997)
Giacomo Buonanno, Fabrizio Ferrandi, L. Ferrandi, Franco Fummi, Donatella Sciuto
How an "Evolving" Fault Model Improves the Behavioral Test Generation. Great Lakes Symposium on VLSI (1997)
Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
Fault detection and fault tolerance issues at CMOS level through AUED encoding. DFT (1996)
Giacomo Buonanno, Fabrizio Ferrandi, Donatella Sciuto
Data Path Testability Analysis Based on BDDs. ISCAS (1995)
Giacomo Buonanno, Franco Fummi, Donatella Sciuto
TIES: A testability increase expert system for VLSI design. J. Electron. Test. 6 (2) (1995)
Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
A new switching-level approach to multiple-output functions synthesis. VLSI Design (1995)
Giacomo Buonanno, Fabio Salice, Donatella Sciuto
Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic. ISCAS (1995)
Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
Innovative Structures for CMOS Combinational Gates Synthesis. IEEE Trans. Computers 43 (4) (1994)
Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
A CMOS Fault Tolerant Architecture for Swith-Level Faults. DFT (1994)
Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
CMOS Reliability Improvements Through a New Fault Tolerant Technique. ISCAS (1994)
Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza
ALADIN: a multilevel testability analyzer for VLSI system design. IEEE Trans. Very Large Scale Integr. Syst. 2 (2) (1994)
Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
New CMOS Structures for the Synthesis of Dominant Functions. VLSI Design (1993)
Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza
An Expert Solution to Functional Testability Analysis of VLSI Circuits. SEKE (1993)
Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza
Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. DFT (1993)
Giacomo Buonanno, Franco Fummi, Donatella Sciuto
Functional Testing and Constrained Synthesis of Sequential Architectures. ISCAS (1993)
Giacomo Buonanno, Franco Fummi, Donatella Sciuto
Fault Detection in Sequential Circuits through Functional Testing. DFT (1993)
Giacomo Buonanno, Franco Fummi, Donatella Sciuto
Functional Fault Models and Gate Level Coverage for Sequential Architectures. ICCD (1993)
Giacomo Buonanno, Fabrizio Lombardi, Donatella Sciuto, Yinan N. Shen
Fault detection in TFCMOS/DFCMOS combinational gates. Integr. 15 (2) (1993)
Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Donatella Sciuto, Giuseppe Zaza
A multi level testability assistant for VLSI design. EURO-DAC (1992)
Giacomo Buonanno, Micaela Serra
State assignment and testability of PLA-based finite state machines. Microprocess. Microprogramming 35 (1-5) (1992)
Giacomo Buonanno, Fabrizio Lombardi, Donatella Sciuto, Y.-N. Sken
Multiple stuck-at faults detection in CMOS combinational gates. Microprocessing and Microprogramming 32 (1-5) (1991)
Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli
Optimization techniques for multiple output function synthesis. EURO-DAC (1991)
Giacomo Buonanno, A. Burri, Franco Fummi, Donatella Sciuto
An approach to a design for testability personal consultant. Microprocessing and Microprogramming 30 (1-5) (1990)