Eldar Zianbetov

Publication Activity (10 Years)

Years Active: 2011-2020
Publications (10 Years): 3

Top Topics

Distributed Architecture

Heterogeneous Systems

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Mehdi Terosiet, Eldar Zianbetov, Farouk Vallette, Marie-Minerve Louërat, Patrick Garda, Dimitri Galayko, Sylvain Feruglio
A comprehensive in-depth study of tri-state inverter based DCO. Microelectron. J. 99 (2020)
Dimitri Galayko, Chuan Shan, Eldar Zianbetov, Mohammad Javidan, Anton Korniienko, François Anceau, Olivier Billoint, Éric Colinet, Elena Blokhina, Jérôme Juillard
Synchronized Interconnected ADPLLs for Distributed Clock Generation in 65 nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs (10) (2019)
Eugene Koskin, Elena Blokhina, Chuan Shan, Eldar Zianbetov, Orla Feely, Dimitri Galayko
Discrete-time modelling and experimental validation of an All-Digital PLL for clock-generating networks. NEWCAS (2016)
Chuan Shan, Eldar Zianbetov, François Anceau, Olivier Billoint, Dimitri Galayko
A distributed synchronization of all-digital PLLs network for clock generation in synchronous SOCs. NEWCAS (2015)
Eldar Zianbetov, Edith Beigné, Gregory di Pendina
Non-volatility for Ultra-Low Power Asynchronous Circuits in Hybrid CMOS/Magnetic Technology. ASYNC (2015)
Jeremy Lopes, Gregory di Pendina, Eldar Zianbetov, Edith Beigné, Lionel Torres
Radiative Effects on MRAM-Based Non-Volatile Elementary Structures. ISVLSI (2015)
Edith Beigné, Jean-Frédéric Christmann, Eldar Zianbetov, Gregory di Pendina
Ultra-low power volatile and non-volatile asynchronous circuits using back-biasing. ECCTD (2015)
Chuan Shan, Dimitri Galayko, François Anceau, Eldar Zianbetov
A reconfigurable distributed architecture for clock generation in large many-core SoC. ReCoSoC (2014)
Dimitri Galayko, Elena Blokhina, Eldar Zianbetov, Andrii Dudka, François Anceau, Éric Colinet, Anton Korniienko, Jérôme Juillard, Philippe Basset
Complexity in heterogeneous systems on chips: Dsign and analysis challenges. ISCAS (2014)
Chuan Shan, François Anceau, Dimitri Galayko, Eldar Zianbetov
"Swimming pool"-like distributed architecture for clock generation in large many-core SoC. ISCAS (2014)
Eldar Zianbetov, Dimitri Galayko, François Anceau, Mohammad Javidan, Chuan Shan, Olivier Billoint, Anton Korniienko, Éric Colinet, Gérard Scorletti, J. M. Akrea, Jérôme Juillard
Distributed clock generator for synchronous SoC using ADPLL network. CICC (2013)
Chuan Shan, Eldar Zianbetov, Weiqiang Yu, François Anceau, Olivier Billoint, Dimitri Galayko
FPGA prototyping of large reconfigurable ADPLL network for distributed clock generation. ReConFig (2013)
Jean-Michel Akre, Jérôme Juillard, Mohammad Javidan, Eldar Zianbetov, Dimitri Galayko, Anton Korniienko, Éric Colinet
A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops. ECCTD (2011)
Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko, Éric Colinet, Jérôme Juillard
A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors. ISCAS (2011)
Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko, Anton Korniienko, Éric Colinet, Gérard Scorletti, Jean-Michel Akre, Jérôme Juillard
All-digital PLL array provides reliable distributed clock for SOCs. ISCAS (2011)
Eldar Zianbetov, François Anceau, Mohammad Javidan, Dimitri Galayko, Éric Colinet, Jérôme Juillard
A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation. ISCAS (2011)
Chuan Shan, Eldar Zianbetov, Mohammad Javidan, François Anceau, Mehdi Terosiet, Sylvain Feruglio, Dimitri Galayko, Olivier Romain, Éric Colinet, Jérôme Juillard
FPGA implementation of reconfigurable ADPLL network for distributed clock generation. FPT (2011)