A reconfigurable distributed architecture for clock generation in large many-core SoC.
Chuan ShanDimitri GalaykoFrançois AnceauEldar ZianbetovPublished in: ReCoSoC (2014)
Keyphrases
- distributed architecture
- reconfigurable architecture
- multi robot
- low cost
- high speed
- case study
- hardware software co design
- intelligent user interfaces
- low power
- generation process
- heterogeneous systems
- general purpose
- hardware and software
- embedded systems
- hardware implementation
- power consumption
- digital signal
- cooperative
- neural network