FPGA prototyping of large reconfigurable ADPLL network for distributed clock generation.
Chuan ShanEldar ZianbetovWeiqiang YuFrançois AnceauOlivier BillointDimitri GalaykoPublished in: ReConFig (2013)
Keyphrases
- peer to peer
- distributed network
- computer networks
- hardware implementation
- high speed
- low cost
- communication cost
- communication overhead
- digital signal
- field programmable gate array
- user friendly
- camera network
- complex networks
- real time
- fault tolerant
- distributed environment
- network traffic
- data transfer
- power consumption
- mobile sensor
- signal processing
- network nodes
- distributed systems
- remote sites
- fpga device
- systolic array
- reconfigurable hardware
- interconnection networks
- network structure
- mobile agents
- multi agent