Mohammad Javidan

Publication Activity (10 Years)

Years Active: 2008-2019
Publications (10 Years): 1

Top Topics

Local Area Network

Power Consumption

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IET Circuits Devices Syst.

Publications

Dimitri Galayko, Chuan Shan, Eldar Zianbetov, Mohammad Javidan, Anton Korniienko, François Anceau, Olivier Billoint, Éric Colinet, Elena Blokhina, Jérôme Juillard
Synchronized Interconnected ADPLLs for Distributed Clock Generation in 65 nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs (10) (2019)
Mohammad Javidan, Jérôme Juillard, Philippe Bénabès
High-loop-delay sixth-order bandpass continuoustime Sigma-Delta modulators. IET Circuits Devices Syst. 7 (6) (2013)
Eldar Zianbetov, Dimitri Galayko, François Anceau, Mohammad Javidan, Chuan Shan, Olivier Billoint, Anton Korniienko, Éric Colinet, Gérard Scorletti, J. M. Akrea, Jérôme Juillard
Distributed clock generator for synchronous SoC using ADPLL network. CICC (2013)
Jean-Michel Akre, Jérôme Juillard, Mohammad Javidan, Eldar Zianbetov, Dimitri Galayko, Anton Korniienko, Éric Colinet
A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops. ECCTD (2011)
Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko, Éric Colinet, Jérôme Juillard
A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors. ISCAS (2011)
Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko, Anton Korniienko, Éric Colinet, Gérard Scorletti, Jean-Michel Akre, Jérôme Juillard
All-digital PLL array provides reliable distributed clock for SOCs. ISCAS (2011)
Eldar Zianbetov, François Anceau, Mohammad Javidan, Dimitri Galayko, Éric Colinet, Jérôme Juillard
A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation. ISCAS (2011)
Chuan Shan, Eldar Zianbetov, Mohammad Javidan, François Anceau, Mehdi Terosiet, Sylvain Feruglio, Dimitri Galayko, Olivier Romain, Éric Colinet, Jérôme Juillard
FPGA implementation of reconfigurable ADPLL network for distributed clock generation. FPT (2011)
Mohammad Javidan, Philippe Bénabès
Band-pass continuous-time delta-sigma modulators employing LWR resonators. ICECS (2008)