Daniel E. Holcomb

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 67

Top Topics

Physical Design

Power Distribution

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Aleksa Deric, Kyle Mitard, Shahin Tajik, Daniel E. Holcomb
Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques. CoRR (2024)
Bharadwaj Madabhushi, Chandra Sekhar Mummidi, Sandip Kundu, Daniel E. Holcomb
Resurrection Attack: Defeating Xilinx MPU's Memory Protection. HOST (2024)
Bharadwaj Madabhushi, Sandip Kundu, Daniel E. Holcomb
Memory Scraping Attack on Xilinx FPGAs: Private Data Extraction from Terminated Processes. CoRR (2024)
Bharadwaj Madabhushi, Sandip Kundu, Daniel E. Holcomb
Memory Scraping Attack on Xilinx FPGAs: Private Data Extraction from Terminated Processes. DATE (2024)
Bharadwaj Madabhushi, Chandra Sekhar Mummidi, Sandip Kundu, Daniel E. Holcomb
Resurrection Attack: Defeating Xilinx MPU's Memory Protection. CoRR (2024)
Xiang Li, Peter Stanwicks, George Provelengios, Russell Tessier, Daniel E. Holcomb
Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
Shanquan Tian, Shayan Moini, Daniel E. Holcomb, Russell Tessier, Jakub Szefer
A Practical Remote Power Attack on Machine Learning Accelerators in Cloud FPGAs. DATE (2023)
Simon Klix, Nils Albartus, Julian Speith, Paul Staat, Alice Verstege, Annika Wilde, Daniel Lammers, Jörn Langheinrich, Christian Kison, Sebastian Sester, Daniel E. Holcomb, Christof Paar
Stealing Maggie's Secrets - On the Challenges of IP Theft Through FPGA Reverse Engineering. CoRR (2023)
Shayan Moini, Dhruv Kansagara, Daniel E. Holcomb, Russell Tessier
Fault Recovery from Multi-Tenant FPGA Voltage Attacks. ACM Great Lakes Symposium on VLSI (2023)
Arjun Suresh, Siva Nishok Dhanuskodi, Daniel E. Holcomb
A Secure Design Methodology to Prevent Targeted Trojan Insertion during Fabrication. ISVLSI (2023)
Shayan Moini, Aleksa Deric, Xiang Li, George Provelengios, Wayne P. Burleson, Russell Tessier, Daniel E. Holcomb
Voltage Sensor Implementations for Remote Power Attacks on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
Aleksa Deric, Daniel E. Holcomb
Know Time to Die - Integrity Checking for Zero Trust Chiplet-based Systems Using Between-Die Delay PUFs. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022 (3) (2022)
Xiaozhe Shao, Zibin Chen, Daniel E. Holcomb, Lixin Gao
Accelerating BGP Configuration Verification Through Reducing Cycles in SMT Constraints. IEEE/ACM Trans. Netw. 30 (6) (2022)
Xiang Li, Russell Tessier, Daniel E. Holcomb
Precise Fault Injection to Enable DFIA for Attacking AES in Remote FPGAs. FCCM (2022)
Shayan Moini, Shanquan Tian, Daniel E. Holcomb, Jakub Szefer, Russell Tessier
Remote Power Side-Channel Attacks on BNN Accelerators in FPGAs. DATE (2021)
Shanquan Tian, Shayan Moini, Adam Wolnikowski, Daniel E. Holcomb, Russell Tessier, Jakub Szefer
Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs. FCCM (2021)
Chip-Hong Chang, Daniel E. Holcomb, Ulrich Rührmair, Patrick Schaumont
The ASHES 2019 special issue at JCEN. J. Cryptogr. Eng. 11 (3) (2021)
Shayan Moini, Shanquan Tian, Daniel E. Holcomb, Jakub Szefer, Russell Tessier
Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (2) (2021)
Siddharth Garg, Daniel E. Holcomb, Jeyavijayan (JV) Rajendran, Ahmad-Reza Sadeghi
Guest Editors' Introduction: Competing to Secure SoCs. IEEE Des. Test 38 (1) (2021)
Julia Burgiel, Daniel E. Holcomb, Ilias Giechaskiel, Shanquan Tian, Jakub Szefer
Characterization of IOBUF-based Ring Oscillators. FPT (2021)
George Provelengios, Daniel E. Holcomb, Russell Tessier
Power Wasting Circuits for Cloud FPGA Attacks. FPL (2020)
Siva Nishok Dhanuskodi, Xiang Li, Daniel E. Holcomb
COUNTERFOIL: Verifying Provenance of Integrated Circuits using Intrinsic Package Fingerprints and Inexpensive Cameras. USENIX Security Symposium (2020)
Xiang Li, Peter Stanwicks, George Provelengios, Russell Tessier, Daniel E. Holcomb
Jitter-based Adaptive True Random Number Generation for FPGAs in the Cloud. FPT (2020)
George Provelengios, Daniel E. Holcomb, Russell Tessier
Power Distribution Attacks in Multitenant FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 28 (12) (2020)
Shayan Moini, Shanquan Tian, Jakub Szefer, Daniel E. Holcomb, Russell Tessier
Remote Power Side-Channel Attacks on CNN Accelerators in FPGAs. CoRR (2020)
Siva Nishok Dhanuskodi, Samuel Allen, Daniel E. Holcomb
Efficient Register Renaming Architectures for 8-bit AES Datapath at 0.55 pJ/bit in 16-nm FinFET. IEEE Trans. Very Large Scale Integr. Syst. 28 (8) (2020)
Shayan Moini, Xiang Li, Peter Stanwicks, George Provelengios, Wayne P. Burleson, Russell Tessier, Daniel E. Holcomb
Understanding and Comparing the Capabilities of On-Chip Voltage Sensors against Remote Power Attacks on FPGAs. MWSCAS (2020)
Siva Nishok Dhanuskodi, Daniel E. Holcomb
Techniques to Reduce Switching and Leakage Energy in Unrolled Block Ciphers. IEEE Trans. Computers 69 (10) (2020)
Samaneh Ghandali, Daniel E. Holcomb, Christof Paar
Temperature-Based Hardware Trojan For Ring-Oscillator-Based TRNGs. CoRR (2019)
George Provelengios, Daniel E. Holcomb, Russell Tessier
Characterizing Power Distribution Attacks in Multi-User FPGA Environments. FPL (2019)
Chip-Hong Chang, Daniel E. Holcomb, Francesco Regazzoni, Ulrich Rührmair, Patrick Schaumont
ASHES 2019: 3rd Workshop on Attacks and Solutions in Hardware Security. CCS (2019)
Mohammad A. Usmani, Shahrzad Keshavarz, Eric Matthews, Lesley Shannon, Russell Tessier, Daniel E. Holcomb
Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration. IEEE Trans. Very Large Scale Integr. Syst. 27 (2) (2019)
Naveen Kumar Dumpala, Shivukumar B. Patil, Daniel E. Holcomb, Russell Tessier
Loop Unrolling for Energy Efficiency in Low-Cost Field-Programmable Gate Arrays. ACM Trans. Reconfigurable Technol. Syst. 11 (4) (2019)
George Provelengios, Chethan Ramesh, Shivukumar B. Patil, Ken Eguro, Russell Tessier, Daniel E. Holcomb
Characterization of Long Wire Data Leakage in Deep Submicron FPGAs. FPGA (2019)
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device- and Logic-Level Techniques. CoRR (2019)
Siva Nishok Dhanuskodi, Daniel E. Holcomb
Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility. ISVLSI (2019)
Shahrzad Keshavarz, Daniel E. Holcomb
Privacy Leakages in Approximate Adders. CoRR (2018)
Chethan Ramesh, Shivukumar B. Patil, Siva Nishok Dhanuskodi, George Provelengios, Sébastien Pillement, Daniel E. Holcomb, Russell Tessier
FPGA Side Channel Attacks without Physical Access. FCCM (2018)
Cunxi Yu, Daniel E. Holcomb
). CoRR (2018)
Shahrzad Keshavarz, Cunxi Yu, Samaneh Ghandali, Xiaolin Xu, Daniel E. Holcomb
Survey on Applications of Formal Methods in Reverse Engineering and Intellectual Property Protection. J. Hardw. Syst. Secur. 2 (3) (2018)
Chip-Hong Chang, Jorge Guajardo, Daniel E. Holcomb, Francesco Regazzoni, Ulrich Rührmair
ASHES 2018- Workshop on Attacks and Solutions in Hardware Security. CCS (2018)
Shahrzad Keshavarz, Falk Schellenberg, Bastian Richter, Christof Paar, Daniel E. Holcomb
SAT-based Reverse Engineering of Gate-Level Schematics using Fault Injection and Probing. CoRR (2018)
Xiaolin Xu, Shahrzad Keshavarz, Domenic Forte, Mark M. Tehranipoor, Daniel E. Holcomb
Bimodal Oscillation as a Mechanism for Autonomous Majority Voting in PUFs. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
Shahrzad Keshavarz, Falk Schellenberg, Bastian Richter, Christof Paar, Daniel E. Holcomb
SAT-based reverse engineering of gate-level schematics using fault injection and probing. HOST (2018)
Shahrzad Keshavarz, Christof Paar, Daniel E. Holcomb
Design Automation for Obfuscated Circuits with Multiple Viable Functions. CoRR (2017)
Vinay C. Patil, Arunkumar Vijayakumar, Daniel E. Holcomb, Sandip Kundu
Improving reliability of weak PUFs via circuit techniques to enhance mismatch. HOST (2017)
Siva Nishok Dhanuskodi, Daniel E. Holcomb
An improved clocking methodology for energy efficient low area AES architectures using register renaming. ISLPED (2017)
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device and Logic-Level Techniques. IEEE Trans. Inf. Forensics Secur. 12 (1) (2017)
Cunxi Yu, Daniel E. Holcomb, Maciej J. Ciesielski
) arithmetic. DATE (2017)
Shahrzad Keshavarz, Christof Paar, Daniel E. Holcomb
Design automation for obfuscated circuits with multiple viable functions. DATE (2017)
Cunxi Yu, Xiangyu Zhang, Duo Liu, Maciej J. Ciesielski, Daniel E. Holcomb
Incremental SAT-Based Reverse Engineering of Camouflaged Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (10) (2017)
Shahrzad Keshavarz, Daniel E. Holcomb
Threshold-based Obfuscated Keys with Quantifiable Security against Invasive Readout. CoRR (2017)
Naveen Kumar Dumpala, Shivukumar B. Patil, Daniel E. Holcomb, Russell Tessier
Energy Efficient Loop Unrolling for Low-Cost FPGAs. FCCM (2017)
Shahrzad Keshavarz, Daniel E. Holcomb
Threshold-based obfuscated keys with quantifiable security against invasive readout. ICCAD (2017)
Shahrzad Keshavarz, Daniel E. Holcomb
Privacy leakages in approximate adders. ISCAS (2017)
Xiaolin Xu, Wayne P. Burleson, Daniel E. Holcomb
Using Statistical Models to Improve the Reliability of Delay-Based PUFs. ISVLSI (2016)
Siva Nishok Dhanuskodi, Daniel E. Holcomb
Energy Optimization of Unrolled Block Ciphers Using Combinational Checkpointing. RFIDSec (2016)
Xiaolin Xu, Daniel E. Holcomb
Reliable PUF design using failure patterns from time-controlled power gating. DFT (2016)
Samaneh Ghandali, Georg T. Becker, Daniel E. Holcomb, Christof Paar
A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks. CHES (2016)
Duo Liu, Cunxi Yu, Xiangyu Zhang, Daniel E. Holcomb
Oracle-guided incremental SAT solving to reverse engineer camouflaged logic circuits. DATE (2016)
Cunxi Yu, Daniel E. Holcomb, Maciej J. Ciesielski
Reverse Engineering of Irreducible Polynomials in GF(2^m) Arithmetic. CoRR (2016)
Shrikant Vyas, Naveen Kumar Dumpala, Russell Tessier, Daniel E. Holcomb
Improving the efficiency of PUF-based key generation in FPGAs using variation-aware placement. FPL (2016)
Xiaolin Xu, Daniel E. Holcomb
A Clockless Sequential PUF with Autonomous Majority Voting. ACM Great Lakes Symposium on VLSI (2016)
Samaneh Ghandali, Georg T. Becker, Daniel E. Holcomb, Christof Paar
A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks. IACR Cryptol. ePrint Arch. 2016 (2016)
Josiah D. Hester, Nicole Tobias, Amir Rahmati, Lanny Sitanayah, Daniel E. Holcomb, Kevin Fu, Wayne P. Burleson, Jacob Sorber
Persistent Clocks for Batteryless Sensing Devices. ACM Trans. Embed. Comput. Syst. 15 (4) (2016)
Siva Nishok Dhanuskodi, Shahrzad Keshavarz, Daniel E. Holcomb
LLPA: Logic State Based Leakage Power Analysis. ISVLSI (2016)
Siva Nishok Dhanuskodi, Daniel E. Holcomb
Energy Optimization of Unrolled Block Ciphers using Combinational Checkpointing. IACR Cryptol. ePrint Arch. 2016 (2016)
Amir Rahmati, Matthew Hicks, Daniel E. Holcomb, Kevin Fu
Probable cause: the deanonymizing effects of approximate DRAM. ISCA (2015)
Xiaolin Xu, Ulrich Rührmair, Daniel E. Holcomb, Wayne P. Burleson
Security Evaluation and Enhancement of Bistable Ring PUFs. IACR Cryptol. ePrint Arch. 2015 (2015)
Xiaolin Xu, Ulrich Rührmair, Daniel E. Holcomb, Wayne P. Burleson
Security Evaluation and Enhancement of Bistable Ring PUFs. RFIDSec (2015)
Xiaolin Xu, Amir Rahmati, Daniel E. Holcomb, Kevin Fu, Wayne P. Burleson
Reliable Physical Unclonable Functions Using Data Retention Voltage of SRAM Cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (6) (2015)
Daniel E. Holcomb, Kevin Fu
Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM. IACR Cryptol. ePrint Arch. 2014 (2014)
Daniel E. Holcomb, Sanjit A. Seshia
Compositional Performance Verification of Network-on-Chip Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (9) (2014)
Ulrich Rührmair, Daniel E. Holcomb
PUFs at a glance. DATE (2014)
Daniel E. Holcomb, Kevin Fu
Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM. CHES (2014)
Amir Rahmati, Mastooreh Salajegheh, Daniel E. Holcomb, Jacob Sorber, Wayne P. Burleson, Kevin Fu
TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks. USENIX Security Symposium (2012)
Daniel E. Holcomb, Amir Rahmati, Mastooreh Salajegheh, Wayne P. Burleson, Kevin Fu
DRV-Fingerprinting: Using Data Retention Voltage of SRAM Cells for Chip Identification. RFIDSec (2012)
Daniel E. Holcomb, Alexander Gotmanov, Michael Kishinevsky, Sanjit A. Seshia
Compositional performance verification of NoC designs. MEMOCODE (2012)
Daniel E. Holcomb, Bryan A. Brady, Sanjit A. Seshia
Abstraction-based performance verification of NoCs. DAC (2011)
Bryan A. Brady, Daniel E. Holcomb, Sanjit A. Seshia
Counterexample-guided SMT-driven optimal buffer sizing. DATE (2011)
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnappa, Prasad Shabadi, Wayne P. Burleson
Low-power sub-threshold design of secure physical unclonable functions. ISLPED (2010)
Daniel E. Holcomb, Wayne P. Burleson, Kevin Fu
Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers. IEEE Trans. Computers 58 (9) (2009)
Daniel E. Holcomb, Wenchao Li, Sanjit A. Seshia
Design as you see FIT: System-level soft error analysis of sequential circuits. DATE (2009)