Vinay C. Patil

Publication Activity (10 Years)

Years Active: 2011-2022
Publications (10 Years): 21

Top Topics

Wavelet Analysis

Electronic Devices

Top Venues

Publications

D. Richard Kuhn, Mohammad S. Raunak, Charles B. Prado, Vinay C. Patil, Raghu N. Kacker
Combination Frequency Differencing for Identifying Design Weaknesses in Physical Unclonable Functions. ICST Workshops (2022)
Vinay C. Patil, Sandip Kundu
Realizing Robust, Lightweight Strong PUFs for Securing Smart Grids. IEEE Trans. Consumer Electron. 68 (1) (2022)
Brunno F. Goldstein, Vinay C. Patil, Victor da Cruz Ferreira, Alexandre Solon Nery, Felipe M. G. França, Sandip Kundu
Preventing DNN Model IP Theft via Hardware Obfuscation. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (2) (2021)
Vinay C. Patil, Sandip Kundu
On Leveraging Multi-threshold FinFETs for Design Obfuscation. ISVLSI (2020)
Leandro Santiago de Araújo, Vinay C. Patil, Leandro Augusto Justen Marzulo, Felipe Maia Galvão França, Sandip Kundu
Efficient Testing of Physically Unclonable Functions for Uniqueness. ATS (2019)
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device- and Logic-Level Techniques. CoRR (2019)
Leandro Santiago de Araújo, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu
Design of Robust, High-Entropy Strong PUFs via Weightless Neural Network. J. Hardw. Syst. Secur. 3 (3) (2019)
Horacio L. França, Charles B. Prado, Vinay C. Patil, Sandip Kundu
Defeating Strong PUF Modeling Attack via Adverse Selection of Challenge-Response Pairs. AsianHOST (2018)
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
On Enhancing Reliability of Weak PUFs via Intelligent Post-Silicon Accelerated Aging. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2018)
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
On IC traceability via blockchain. VLSI-DAT (2018)
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
A guide to graceful aging: How not to overindulge in post-silicon burn-in for enhancing reliability of weak PUF. ISCAS (2017)
Vinay C. Patil, Arunkumar Vijayakumar, Daniel E. Holcomb, Sandip Kundu
Improving reliability of weak PUFs via circuit techniques to enhance mismatch. HOST (2017)
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device and Logic-Level Techniques. IEEE Trans. Inf. Forensics Secur. 12 (1) (2017)
Md. Nazmul Islam, Vinay C. Patil, Sandip Kundu
Determining proximal geolocation of IoT edge devices via covert channel. ISQED (2017)
Leandro Santiago, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu
Realizing strong PUF from weak PUF via neural computing. DFT (2017)
Pavithra Ramesh, Vinay C. Patil, Sandip Kundu
Peer pressure on identity: On requirements for disambiguating PUFs in noisy environment. NATW (2017)
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
On testing physically unclonable functions for uniqueness. ISQED (2016)
Arunkumar Vijayakumar, Vinay C. Patil, Charles B. Prado, Sandip Kundu
Machine learning resistant strong PUF: Possible or a pipe dream? HOST (2016)
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
Preventing integrated circuit piracy via custom encoding of hardware instruction set. ISQED (2016)
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
An Efficient Method for Clock Skew Scheduling to Reduce Peak Current. VLSI Design (2016)
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
On meta-obfuscation of physical layouts to conceal design characteristics. DFT (2016)
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery. ISVLSI (2014)
Arunkumar Vijayakumar, Vinay C. Patil, Girish Paladugu, Sandip Kundu
On pattern generation for maximizing IR drop. ISQED (2014)
Vinay C. Patil, Sudarshan Srinivasan, Wayne P. Burleson, Sandip Kundu
Impact of Clock-Gating on Power Distribution Network Using Wavelet Analysis. VLSI Design (2013)
Raghavan Kumar, Vinay C. Patil, Sandip Kundu
On Design of Temperature Invariant Physically Unclonable Functions Based on Ring Oscillators. ISVLSI (2012)
Raghavan Kumar, Vinay C. Patil, Sandip Kundu
Design of Unique and Reliable Physically Unclonable Functions Based on Current Starved Inverter Chain. ISVLSI (2011)