On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery.

Arunkumar Vijayakumar Vinay C. Patil Sandip Kundu

Published in: ISVLSI (2014)

Keyphrases

power consumption
high speed
input output
low power
multi valued
modal logic
neural network
information retrieval
knowledge base
knowledge representation
partial occlusion
automated reasoning
classical logic
predicate logic