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On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery.
Arunkumar Vijayakumar
Vinay C. Patil
Sandip Kundu
Published in:
ISVLSI (2014)
Keyphrases
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power consumption
high speed
input output
low power
multi valued
modal logic
neural network
information retrieval
knowledge base
knowledge representation
partial occlusion
automated reasoning
classical logic
predicate logic