Arunkumar Vijayakumar

Publication Activity (10 Years)

Years Active: 2011-2019
Publications (10 Years): 8

Top Topics

Physical Design

Chaotic Particle Swarm Optimization

Fingerprint Authentication

Random Number Generator

Top Venues

Publications

Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device- and Logic-Level Techniques. CoRR (2019)
Vinay C. Patil, Arunkumar Vijayakumar, Daniel E. Holcomb, Sandip Kundu
Improving reliability of weak PUFs via circuit techniques to enhance mismatch. HOST (2017)
Arunkumar Vijayakumar, Vinay C. Patil, Daniel E. Holcomb, Christof Paar, Sandip Kundu
Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device and Logic-Level Techniques. IEEE Trans. Inf. Forensics Secur. 12 (1) (2017)
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
On testing physically unclonable functions for uniqueness. ISQED (2016)
Arunkumar Vijayakumar, Vinay C. Patil, Charles B. Prado, Sandip Kundu
Machine learning resistant strong PUF: Possible or a pipe dream? HOST (2016)
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
Preventing integrated circuit piracy via custom encoding of hardware instruction set. ISQED (2016)
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
An Efficient Method for Clock Skew Scheduling to Reduce Peak Current. VLSI Design (2016)
Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu
On meta-obfuscation of physical layouts to conceal design characteristics. DFT (2016)
Arunkumar Vijayakumar, Sandip Kundu
A novel modeling attack resistant PUF design based on non-linear voltage transfer characteristics. DATE (2015)
Siva Nishok Dhanuskodi, Arunkumar Vijayakumar, Sandip Kundu
A Chaotic Ring oscillator based Random Number Generator. HOST (2014)
Arunkumar Vijayakumar, Sandip Kundu
Glitch Power Reduction via Clock Skew Scheduling. ISVLSI (2014)
Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu
On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery. ISVLSI (2014)
Arunkumar Vijayakumar, Vinay C. Patil, Girish Paladugu, Sandip Kundu
On pattern generation for maximizing IR drop. ISQED (2014)
Arunachalam Annamalai, Raghavan Kumar, Arunkumar Vijayakumar, Sandip Kundu
A system-level solution for managing spatial temperature gradients in thinned 3D ICs. ISQED (2013)
Arunkumar Vijayakumar, Raghavan Kumar, Sandip Kundu
On Design of Low Cost Power Supply Noise Detection Sensor for Microprocessors. ISVLSI (2012)
Sudarshan Srinivasan, Bharath Phanibhushana, Arunkumar Vijayakumar, Sandip Kundu
Stress aware switching activity driven low power design of critical paths in nanoscale CMOS circuits. ACM Great Lakes Symposium on VLSI (2011)