Loop Unrolling for Energy Efficiency in Low-Cost Field-Programmable Gate Arrays.
Naveen Kumar DumpalaShivukumar B. PatilDaniel E. HolcombRussell TessierPublished in: ACM Trans. Reconfigurable Technol. Syst. (2019)
Keyphrases
- energy efficiency
- low cost
- field programmable gate array
- embedded systems
- smart home
- reconfigurable hardware
- power consumption
- energy consumption
- wireless sensor networks
- energy efficient
- sensor networks
- data center
- low power
- hardware implementation
- cost effective
- routing protocol
- programmable logic
- battery powered
- response time
- hardware design
- fpga technology
- parallel computing
- hardware and software
- hardware software co design
- hardware software
- image processing algorithms
- real time
- high performance computing
- power management
- computing systems
- image processing
- sensor nodes
- hardware description language
- massively parallel
- application specific integrated circuits
- general purpose processors
- artificial intelligence