Shanquan Tian

Publication Activity (10 Years)

Years Active: 2019-2023
Publications (10 Years): 15

Top Topics

Spatial Locality

Software Implementation

Ibm Power Processor

Top Venues

Publications

Shanquan Tian, Shayan Moini, Daniel E. Holcomb, Russell Tessier, Jakub Szefer
A Practical Remote Power Attack on Machine Learning Accelerators in Cloud FPGAs. DATE (2023)
Ilias Giechaskiel, Shanquan Tian, Jakub Szefer
Cross-VM Covert- and Side-Channel Attacks in Cloud FPGAs. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
Shayan Moini, Shanquan Tian, Daniel E. Holcomb, Jakub Szefer, Russell Tessier
Remote Power Side-Channel Attacks on BNN Accelerators in FPGAs. DATE (2021)
Shanquan Tian, Shayan Moini, Adam Wolnikowski, Daniel E. Holcomb, Russell Tessier, Jakub Szefer
Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs. FCCM (2021)
Shayan Moini, Shanquan Tian, Daniel E. Holcomb, Jakub Szefer, Russell Tessier
Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (2) (2021)
Ilias Giechaskiel, Shanquan Tian, Jakub Szefer
Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments. HOST (2021)
Julia Burgiel, Daniel E. Holcomb, Ilias Giechaskiel, Shanquan Tian, Jakub Szefer
Characterization of IOBUF-based Ring Oscillators. FPT (2021)
Shanquan Tian, Ilias Giechaskiel, Wenjie Xiong, Jakub Szefer
Cloud FPGA Cartography using PCIe Contention. FCCM (2021)
Shayan Moini, Shanquan Tian, Jakub Szefer, Daniel E. Holcomb, Russell Tessier
Remote Power Side-Channel Attacks on CNN Accelerators in FPGAs. CoRR (2020)
Wen Wang, Shanquan Tian, Bernhard Jungk, Nina Bindel, Patrick Longa, Jakub Szefer
Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA. IACR Cryptol. ePrint Arch. 2020 (2020)
Shanquan Tian, Andrew Krzywosz, Ilias Giechaskiel, Jakub Szefer
Cloud FPGA Security with RO-Based Primitives. FPT (2020)
Wen Wang, Shanquan Tian, Bernhard Jungk, Nina Bindel, Patrick Longa, Jakub Szefer
Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020 (3) (2020)
Shanquan Tian, Wenjie Xiong, Ilias Giechaskiel, Kasper Rasmussen, Jakub Szefer
Fingerprinting Cloud FPGA Infrastructures. FPGA (2020)
Shanquan Tian, Wen Wang, Jakub Szefer
Merge-Exchange Sort Based Discrete Gaussian Sampler with Fixed Memory Access Pattern. FPT (2019)
Shanquan Tian, Jakub Szefer
Temporal Thermal Covert Channels in Cloud FPGAs. FPGA (2019)