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Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA.
Wen Wang
Shanquan Tian
Bernhard Jungk
Nina Bindel
Patrick Longa
Jakub Szefer
Published in:
IACR Cryptol. ePrint Arch. (2020)
Keyphrases
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hw sw
neural network
efficient implementation
hardware and software