Chih-Ang Chen

Publication Activity (10 Years)

Years Active: 1994-1998
Publications (10 Years): 0

Publications

Chih-Ang Chen, Sandeep K. Gupta
Efficient BIST TPG design and test set compaction via input reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (8) (1998)
Chih-Ang Chen, Sandeep K. Gupta
A Satisfiability-Based Test Generator for Path Delay Faults in Combinational Circuts. DAC (1996)
Chih-Ang Chen, Sandeep K. Gupta
Design of efficient BIST test pattern generators for delay testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (12) (1996)
Chih-Ang Chen, Sandeep K. Gupta
BIST Test Pattern Generators for Two-Pattern Testing-Theory and Design Algorithms. IEEE Trans. Computers 45 (3) (1996)
Chih-Ang Chen, Sandeep K. Gupta
A Methodology to Design Efficient BIST Test Pattern Generators. ITC (1995)
Chih-Ang Chen, Sandeep K. Gupta
BIST Test Pattern Generators for Stuck-Open and Delay Testing. EDAC-ETC-EUROASIC (1994)
Chi-Ying Tsui, Massoud Pedram, Chih-Ang Chen, Alvin M. Despain
Low power state assignment targeting two-and multi-level logic implementations. ICCAD (1994)