Low power state assignment targeting two-and multi-level logic implementations.

Chi-Ying Tsui Massoud Pedram Chih-Ang Chen Alvin M. Despain

Published in: ICCAD (1994)

Keyphrases

low power
high speed
power consumption
logic circuits
low cost
delay insensitive
single chip
high power
low power consumption
wireless transmission
digital signal processing
vlsi architecture
vlsi circuits
power reduction
efficient implementation
cmos technology
signal processor