César Torres-Huitzil

Publication Activity (10 Years)

Years Active: 2000-2021
Publications (10 Years): 18

Top Topics

Pseudorandom Number

Image Thresholding

Fpga Implementation

Top Venues

IEICE Electron. Express

Publications

Rafael Pérez-Torres, César Torres-Huitzil, Thuy Truong, Donagh Buckley, Cormac J. Sreenan
Using Context-Awareness for Storage Services in Edge Computing. IT Prof. 23 (2) (2021)
Marco Aurelio Nuño-Maganda, César Torres-Huitzil, Yahir Hernandez-Mier, Jorge de la Calleja, Carmen Carlota Martinez-Gil, Jose Hugo Barron-Zambrano, Alan Díaz-Manríquez
Smartphone-Based Remote Monitoring Tool for e-Learning. IEEE Access 8 (2020)
Moisés Arredondo-Velázquez, Javier Díaz-Carmona, César Torres-Huitzil, José Alfredo Padilla-Medina, Juan Prado-Olivarez
A streaming architecture for Convolutional Neural Networks based on layer operations chaining. J. Real Time Image Process. 17 (5) (2020)
Bernard Girau, César Torres-Huitzil
Fault tolerance of self-organizing maps. Neural Comput. Appl. 32 (24) (2020)
Rafael Pérez-Torres, César Torres-Huitzil, Hiram Galeana-Zapién
A Cognitive-Inspired Event-Based Control for Power-Aware Human Mobility Analysis in IoT Devices. Sensors 19 (4) (2019)
Rafael Pérez-Torres, César Torres-Huitzil, Hiram Galeana-Zapién
A Spatio-Temporal Approach to Individual Mobility Modeling in On-Device Cognitive Computing Platforms. Sensors 19 (18) (2019)
Moisés Arredondo-Velázquez, Javier Díaz-Carmona, César Torres-Huitzil, Alejandro Israel Barranco Gutiérrez, José Alfredo Padilla-Medina, Juan Prado-Olivarez
A streaming accelerator of Convolutional Neural Networks for resource-limited applications. IEICE Electron. Express 16 (23) (2019)
Josue Reyes-Garcia, Hiram Galeana-Zapién, Alejandro Galaviz-Mosqueda, César Torres-Huitzil
Evaluation of the Impact of Data Uncertainty on the Prediction of Physiological Patient Deterioration. IEEE Access 6 (2018)
Rafael Pérez-Torres, César Torres-Huitzil, Hiram Galeana-Zapién
An On-Device Cognitive Dynamic Systems Inspired Sensing Framework for the IoT. IEEE Commun. Mag. 56 (9) (2018)
Marco Aurelio Nuño-Maganda, Hiram Herrera-Rivas, César Torres-Huitzil, Heidy Marisol Marín Castro, Yuriria Coronado-Pérez
On-Device Learning of Indoor Location for WiFi Fingerprint Approach. Sensors 18 (7) (2018)
César Torres-Huitzil, Oleksandr V. Popovych, Bernard Girau
Fault tolerance of self organizing maps. WSOM (2017)
César Torres-Huitzil, Bernard Girau
Fault and Error Tolerance in Neural Networks: A Review. IEEE Access 5 (2017)
Bernard Girau, César Torres-Huitzil
Optimal weight storage improves fault tolerance of SOMs. ReConFig (2017)
César Torres-Huitzil, Bernard Girau
Fault tolerance in neural networks: Neural design and hardware implementation. ReConFig (2017)
Rafael Pérez-Torres, César Torres-Huitzil, Hiram Galeana-Zapién
Full On-Device Stay Points Detection in Smartphones for Location-Based Mobile Applications. Sensors 16 (10) (2016)
Rafael Pérez-Torres, César Torres-Huitzil, Hiram Galeana-Zapién
Power management techniques in smartphone-based mobility sensing systems: A survey. Pervasive Mob. Comput. 31 (2016)
Benoît Chappet de Vangel, César Torres-Huitzil, Bernard Girau
Event based visual attention with dynamic neural field on FPGA. ICDSC (2016)
César Torres-Huitzil
FPGA-based fast computation of gray-level morphological granulometries. J. Real Time Image Process. 11 (3) (2016)
César Torres-Huitzil, Marco Aurelio Nuño-Maganda
Robust smartphone-based human activity recognition using a tri-axial accelerometer. LASCAS (2015)
Horacio Rostro-González, Pedro Alberto Cerna-Garcia, Gerardo Trejo-Caballero, Carlos H. Garcia-Capulin, Mario Alberto Ibarra-Manzano, Juan Gabriel Aviña-Cervantes, César Torres-Huitzil
A CPG system based on spiking neurons for hexapod robot locomotion. Neurocomputing 170 (2015)
Benoit Chappet de Vangel, César Torres-Huitzil, Bernard Girau
Stochastic and asynchronous spiking dynamic neural fields. IJCNN (2015)
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido
Processor arrays generation for matrix algorithms used in embedded platforms implemented on FPGAs. Microprocess. Microsystems 39 (7) (2015)
Jose Hugo Barron-Zambrano, César Torres-Huitzil, Bernard Girau
Perception-driven adaptive CPG-based locomotion for hexapod robots. Neurocomputing 170 (2015)
Benoit Chappet de Vangel, César Torres-Huitzil, Bernard Girau
Randomly Spiking Dynamic Neural Fields. ACM J. Emerg. Technol. Comput. Syst. 11 (4) (2015)
César Torres-Huitzil
Fast hardware architecture for grey-level image morphology with flat structuring elements. IET Image Process. 8 (2) (2014)
César Torres-Huitzil, Marco Aurelio Nuño-Maganda
Areatime Efficient Implementation of Local Adaptive Image Thresholding in Reconfigurable Hardware. SIGARCH Comput. Archit. News 42 (4) (2014)
Benoit Chappet de Vangel, César Torres-Huitzil, Bernard Girau
Spiking dynamic neural fields architectures on FPGA. ReConFig (2014)
Hiram Galeana-Zapién, César Torres-Huitzil, Javier Rubio-Loyola
Mobile Phone Middleware Architecture for Energy and Context Awareness in Location-Based Services. Sensors 14 (12) (2014)
Marco Aurelio Nuño-Maganda, Yahir Hernandez-Mier, César Torres-Huitzil, Josue Jimenez-Arteaga
FPGA-based real-time citrus classification system. LASCAS (2014)
Victor Rodríguez-Osoria, Marco Aurelio Nuño-Maganda, Yahir Hernandez-Mier, César Torres-Huitzil
Embedded Image Processing System for Automatic Page Segmentation of Open Book Images. ISVC (2) (2014)
Carlos Andres Lara-Nino, César Torres-Huitzil, Jose Hugo Barron-Zambrano
Versatile educational and research robotic platform based on reconfigurable hardware. ReConFig (2014)
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido, Juan M. Campos
Processor arrays generation for matrix algorithms used in embedded platforms. ReConFig (2013)
César Torres-Huitzil
Hardware realization of a lightweight 2D cellular automata-based cipher for image encryption. LASCAS (2013)
Lorenzo Antonio Delgado-Guillen, Jose Juan Garcia-Hernandez, César Torres-Huitzil
Digital watermarking of color images utilizing mobile platforms. MWSCAS (2013)
Jose Hugo Barron-Zambrano, César Torres-Huitzil
FPGA implementation of a configurable neuromorphic CPG-based locomotion controller. Neural Networks 45 (2013)
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido, Juan M. Campos
On an external memory scheme for processor arrays. IEICE Electron. Express 10 (14) (2013)
Marco Delgadillo-Escobar, César Torres-Huitzil
FPGA implementation of Pseudorandom Number Generators with a generic 2-D cellular automata architecture. CONIELECOMP (2012)
Jose Hugo Barron-Zambrano, César Torres-Huitzil, Horacio Rostro-González
Versatile FPGA-based locomotion platform for legged robots. ReConFig (2012)
Lorenzo Antonio Delgado-Guillen, Jose Juan Garcia-Hernandez, César Torres-Huitzil
Validating the existence of watermarks on digital images using a mobile phone. ICITST (2012)
Horacio Rostro-González, Guillaume Garreau, Andreas G. Andreou, Julius Georgiou, Jose Hugo Barron-Zambrano, César Torres-Huitzil
An FPGA-based approach for parameter estimation in spiking neural networks. ISCAS (2012)
Marco Aurelio Nuño-Maganda, Miguel O. Arias-Estrada, César Torres-Huitzil, Héctor Hugo Avilés-Arriaga, Yahir Hernandez-Mier, Miguel Morales-Sandoval
A Hardware Architecture for Image Clustering Using Spiking Neural Networks. ISVLSI (2012)
César Torres-Huitzil, Marco Delgadillo-Escobar, Marco Aurelio Nuño-Maganda
Comparison between 2D cellular automata based pseudorandom number generators. IEICE Electron. Express 9 (17) (2012)
Jose Hugo Barron-Zambrano, César Torres-Huitzil
Two-phase GA parameter tunning method of CPGs for quadruped gaits. IJCNN (2011)
Marco Aurelio Nuño-Maganda, Miguel Morales-Sandoval, César Torres-Huitzil
A Hardware Coprocessor Integrated with OpenCV for Edge Detection Using Cellular Neural Networks. ICIG (2011)
Jose Hugo Barron-Zambrano, César Torres-Huitzil, Jose Juan Garcia-Hernandez
FPGA-based CPG Robot Locomotion Modulation Using a Fuzzy Scheme and Visual Information. ReConFig (2011)
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido, Juan M. Campos
On a Hybrid and General Control Scheme for Algorithms Represented as a Polytope. IPDPS Workshops (2011)
Jose Hugo Barron-Zambrano, César Torres-Huitzil, Bernard Girau
Hardware Implementation of a CPG-Based Locomotion Control for Quadruped Robots. ICANN (2) (2010)
Marco Aurelio Nuño-Maganda, César Torres-Huitzil
A temporal coding hardware implementation for spiking neural networks. SIGARCH Comput. Archit. News 38 (4) (2010)
Jose Hugo Barron-Zambrano, César Torres-Huitzil, Bernard Girau
FPGA-based Circuit for Central Pattern Generator in Quadruped Locomotion. Aust. J. Intell. Inf. Process. Syst. 12 (2) (2010)
Marco Aurelio Nuño-Maganda, Miguel O. Arias-Estrada, César Torres-Huitzil, Bernard Girau
Hardware implementation of Spiking Neural Network classifiers based on backpropagation-based learning algorithms. IJCNN (2009)
César Torres-Huitzil
On the Implementation of Central Pattern Generators for Periodic Rhythmic Locomotion. ReConFig (2009)
Bernard Girau, César Torres-Huitzil, Nikolaos Vlassopoulos, Jose Hugo Barron-Zambrano
Reaction Diffusion and Chemotaxis for Decentralized Gathering on FPGAs. Int. J. Reconfigurable Comput. 2009 (2009)
César Torres-Huitzil, Bernard Girau, Amine M. Boumaza, Bruno Scherrer
Embedded Harmonic Control for Trajectory Planning in Large Environments. ReConFig (2008)
César Torres-Huitzil, Bernard Girau
Implementation of Central Pattern Generator in an FPGA-Based Embedded System. ICANN (2) (2008)
Bernard Girau, César Torres-Huitzil
Fast Implementation of a Bio-inspired Model for Decentralized Gathering. ReConFig (2008)
Jose Hugo Barron-Zambrano, César Torres-Huitzil, Mauricio Cerda
Flexible Architecture for Three Classes of Optical Flow Extraction Algorithms. ReConFig (2008)
César Torres-Huitzil, Bernard Girau, Miguel O. Arias-Estrada
Biologically-Inspired Digital Architecture for a Cortical Model of Orientation Selectivity. ICANN (2) (2008)
Marco Aurelio Nuño-Maganda, Miguel O. Arias-Estrada, César Torres-Huitzil
High Performance Hardware Implementation of SpikeProp Learning: Potential and Tradeoffs. FPT (2007)
Bernard Girau, César Torres-Huitzil
Massively distributed digital implementation of an integrate-and-fire LEGION network for visual scene segmentation. Neurocomputing 70 (7-9) (2007)
César Torres-Huitzil, Bernard Girau, Adrien Gauffriau
Hardware/Software Codesign for Embedded Implementation of Neural Networks. ARC (2007)
César Torres-Huitzil
A Bit-Stream Pulse-Based Digital Neuron Model for Neural Networks. ICONIP (3) (2006)
César Torres-Huitzil
Area-Efficient Implementation of a Pulse-Mode Neuron Model. FPL (2006)
Bernard Girau, César Torres-Huitzil
FPGA implementation of an integrate-and-fire LEGION model for image segmentation. ESANN (2006)
César Torres-Huitzil, Bernard Girau
FPGA Implementation of an Excitatory and Inhibitory Connectionist Model for Motion Perception. FPT (2005)
César Torres-Huitzil, Miguel O. Arias-Estrada
FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing. EURASIP J. Adv. Signal Process. 2005 (7) (2005)
César Torres-Huitzil, Bernard Girau, Claudio Castellanos Sánchez
On-chip visual perception of motion: A bio-inspired connectionist model on FPGA. Neural Networks 18 (5-6) (2005)
César Torres-Huitzil, Miguel O. Arias-Estrada
Real-time image processing with a compact FPGA-based systolic architecture. Real Time Imaging 10 (3) (2004)
César Torres-Huitzil, René Cumplido-Parra, Santos López-Estrada
Design and Implementation of a CFAR Processor for Target Detection. FPL (2004)
Santos López-Estrada, René Cumplido-Parra, César Torres-Huitzil
A Hybrid Approach for Target Detection Using CFAR Algorithm and Image Processing. ENC (2004)
César Torres-Huitzil, Miguel O. Arias-Estrada
Configurable Hardware Architecture for Real-Time Window-Based Image Processing. FPL (2003)
César Torres-Huitzil, Selene Maya-Rueda, Miguel O. Arias-Estrada
A reconfigurable vision system for real-time applications. FPT (2002)
Miguel O. Arias-Estrada, César Torres-Huitzil
Real-time field programmable gate array architecture for computer vision. J. Electronic Imaging 10 (1) (2001)
Selene Maya, M. Rocio Reynoso, César Torres-Huitzil, Miguel O. Arias-Estrada
Compact Spiking Neural Network Implementation in FPGA. FPL (2000)
César Torres-Huitzil, Miguel O. Arias-Estrada
An FPGA Architecture for High Speed Edge and Corner Detection. CAMP (2000)