Carl-Johan H. Seger

Publication Activity (10 Years)

Years Active: 1986-2023
Publications (10 Years): 7

Top Topics

Character Recognition

Chinese Text Retrieval

Functional Language

Top Venues

Publications

Jeremy Pope, Carl-Johan H. Seger
Bifröst: Creating Hardware With Building Blocks. FDL (2023)
Carl-Johan H. Seger
Formal Verification of Complex Data Paths: An Industrial Experience. FM (2021)
Jeremy Pope, Jules Saget, Carl-Johan H. Seger
Cephalopode: A custom processor aimed at functional language execution for IoT devices. MEMOCODE (2020)
Jeremy Pope, Jules Saget, Carl-Johan H. Seger
Stately: An FSM Design Tool. MEMOCODE (2020)
Supratik Chakraborty, Zurab Khasidashvili, Carl-Johan H. Seger, Rajkumar Gajavelly, Tanmay Haldankar, Dinesh Chhatani, Rakesh Mistry
Symbolic trajectory evaluation for word-level verification: theory and implementation. Formal Methods Syst. Des. 50 (2-3) (2017)
Supratik Chakraborty, Zurab Khasidashvili, Carl-Johan H. Seger, Rajkumar Gajavelly, Tanmay Haldankar, Dinesh Chhatani, Rakesh Mistry
Word-Level Symbolic Trajectory Evaluation. CAV (2) (2015)
Supratik Chakraborty, Zurab Khasidashvili, Carl-Johan H. Seger, Rajkumar Gajavelly, Tanmay Haldankar, Dinesh Chhatani, Rakesh Mistry
Word-level Symbolic Trajectory Evaluation. CoRR (2015)
Sara Adams, Magnus Björk, Thomas F. Melham, Carl-Johan H. Seger
Automatic Abstraction in Symbolic Trajectory Evaluation. FMCAD (2007)
Carl-Johan H. Seger, Robert B. Jones, John W. O'Leary, Thomas F. Melham, Mark D. Aagaard, Clark W. Barrett, Don Syme
An industrially effective environment for formal hardware verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (9) (2005)
Jin Yang, Carl-Johan H. Seger
Compositional Specification and Model Checking in GSTE. CAV (2004)
Jin Yang, Carl-Johan H. Seger
Introduction to generalized symbolic trajectory evaluation. IEEE Trans. Very Large Scale Integr. Syst. 11 (3) (2003)
Jin Yang, Carl-Johan H. Seger
Generalized Symbolic Trajectory Evaluation - Abstraction in Action. FMCAD (2002)
Jin Yang, Carl-Johan H. Seger
Introduction to Generalized Symbolic Trajectory Evaluation. ICCD (2001)
John Moondanos, Carl-Johan H. Seger, Ziyad Hanna, Daher Kaiss
CLEVER: Divide and Conquer Combinational Logic Equivalence VERification with False Negative Elimination. CAV (2001)
Robert B. Jones, John W. O'Leary, Carl-Johan H. Seger, Mark D. Aagaard, Thomas F. Melham
Practical Formal Verification in Microprocessor Design. IEEE Des. Test Comput. 18 (4) (2001)
Carl-Johan H. Seger
Connecting Bits with Floating-Point Numbers: Model Checking and Theorem Proving in Practice. CADE (2000)
Mark D. Aagaard, Robert B. Jones, Thomas F. Melham, John W. O'Leary, Carl-Johan H. Seger
A Methodology for Large-Scale Hardware Verification. FMCAD (2000)
Mark D. Aagaard, Robert B. Jones, Roope Kaivola, Katherine R. Kohatsu, Carl-Johan H. Seger
Formal verification of iterative algorithms in microprocessors. DAC (2000)
Carl-Johan H. Seger
Combining functional programming and hardware verification (abstract of invited talk). ICFP (2000)
Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger
Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving. TPHOLs (1999)
Scott Hazelhurst, Carl-Johan H. Seger
Model Checking Lattices: Using and reasoning about information orders for abstraction. Log. J. IGPL 7 (3) (1999)
Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger
Parametric Representations of Boolean Constraints. DAC (1999)
Carl-Johan H. Seger
From lattices to practical formal hardware verification. PROCOMET (1998)
Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger
Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment. DAC (1998)
Carl-Johan H. Seger
Formal Methods in CAD from an Industrial Perspective (abstract). FMCAD (1998)
Scott Hazelhurst, Carl-Johan H. Seger
Symbolic Trajectory Evaluation. Formal Hardware Verification (1997)
Robert B. Jones, Carl-Johan H. Seger, David L. Dill
Self-Consistency Checking. FMCAD (1996)
Carl-Johan H. Seger, Randal E. Bryant
Formal Verification by Symbolic Evaluation of Partially-Ordered Trajectories. Formal Methods Syst. Des. 6 (2) (1995)
Mark D. Aagaard, Carl-Johan H. Seger
The formal verification of a pipelined double-precision IEEE floating-point multiplier. ICCAD (1995)
Scott Hazelhurst, Carl-Johan H. Seger
A simple theorem prover based on symbolic trajectory evaluation and BDD's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (4) (1995)
Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger
Automatic Verification of Asynchronous Circuits. IEEE Des. Test Comput. 12 (1) (1995)
Carl-Johan H. Seger, Janusz A. Brzozowski
Generalized Ternary Simulation of Sequential Circuits. RAIRO Theor. Informatics Appl. 28 (3-4) (1994)
Carl-Johan H. Seger, Randal E. Bryant
Digital Circuit Verification Using Partially-Ordered State Models. ISMVL (1994)
Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger
Automatic Verification of Refinement. ICCD (1994)
Scott Hazelhurst, Carl-Johan H. Seger
Composing Symbolic Trajectory Evaluation Results. CAV (1994)
Zheng Zhu, Carl-Johan H. Seger
The Completeness of a Hardware Inference System. CAV (1994)
Sreeranga P. Rajan, Jeffrey J. Joyce, Carl-Johan H. Seger
From Abstract Data Types to Shift Registers: A Case Study in Formal Specification and Verification at Differing Levels of Abstraction using Theorem Proving and Symbolic Simulation. HUG (1993)
Jeffrey J. Joyce, Carl-Johan H. Seger
Linking BDD-Based Symbolic Evaluation to Interactive Theorem-Proving. DAC (1993)
Jeffrey J. Joyce, Carl-Johan H. Seger
The HOL-Voss System: Model-Checking inside a General-Purpose Theorem-Prover. HUG (1993)
Zheng Zhu, Jeffrey J. Joyce, Carl-Johan H. Seger
Verification of the Tamarack-3 Microprocessor in a Hybrid Verification Environment. HUG (1993)
Carl-Johan H. Seger
On the Existence of Speed-Independent Circuits. Theor. Comput. Sci. 86 (2) (1991)
Randal E. Bryant, Derek L. Beatty, Carl-Johan H. Seger
Formal Hardware Verification by Symbolic Ternary Trajectory Evaluation. DAC (1991)
Carl-Johan H. Seger, Jeffrey J. Joyce
A Two-Level Formal Verification Methodology using HOL and COSMOS. CAV (1991)
Randal E. Bryant, Carl-Johan H. Seger
Formal Verification of Digital Circuits Using Symbolic Ternary System Models. CAV (1990)
Randal E. Bryant, Carl-Johan H. Seger
Formal Verification of Digital Circuits Using Symbolic Ternary System Models. CAV (DIMACS/AMS volume) (1990)
Carl-Johan H. Seger
A bounded delay race model. ICCAD (1989)
Janusz A. Brzozowski, Carl-Johan H. Seger
A unified framework for race analysis of asynchronous networks. J. ACM 36 (1) (1989)
Carl-Johan H. Seger, Janusz A. Brzozowski
An Optimistic Ternary Simulation of Gate Races. Theor. Comput. Sci. 61 (1988)
Janusz A. Brzozowski, Carl-Johan H. Seger
A Characterization of Ternary Simulation of Gate Networks. IEEE Trans. Computers 36 (11) (1987)
Janusz A. Brzozowski, Carl-Johan H. Seger
Correspondence between Ternary Simulation and Binary Race Analysis in Gate Networks (Extended Summary). ICALP (1986)
David J. Taylor, Carl-Johan H. Seger
Robust Storage Structures for Crash Recovery. IEEE Trans. Computers 35 (4) (1986)