Formal verification of iterative algorithms in microprocessors.
Mark D. AagaardRobert B. JonesRoope KaivolaKatherine R. KohatsuCarl-Johan H. SegerPublished in: DAC (2000)
Keyphrases
- iterative algorithms
- formal verification
- model checking
- model checker
- computer architecture
- computing power
- bounded model checking
- symbolic model checking
- personal computer
- automated verification
- program slicing
- dual formulation
- single chip
- instruction set
- functional verification
- iterative methods
- formal specification
- reverse engineering
- temporal logic