Login / Signup
Formal Hardware Verification by Symbolic Ternary Trajectory Evaluation.
Randal E. Bryant
Derek L. Beatty
Carl-Johan H. Seger
Published in:
DAC (1991)
Keyphrases
</>
hardware and software
formal methods
database
real time
low cost
formal analysis
image processing
gold standard
data sets
high level
general purpose
formal model
embedded systems
evaluation model
massively parallel
hardware designs