C. Y. Roger Chen

Publication Activity (10 Years)

Years Active: 1988-2022
Publications (10 Years): 4

Top Topics

Content Adaptation

Ambient Intelligence

Context Aware Systems

Top Venues

Microelectron. J.

Entertain. Comput.

Publications

Chunxu Tang, Beinan Wang, C. Y. Roger Chen, Huijun Wu
CWcollab: Presenting multimedia with web-based context-aware collaboration. Entertain. Comput. 43 (2022)
Chunxu Tang, Beinan Wang, C. Y. Roger Chen, Huijun Wu
CWcollab: A Context-Aware Web-Based Collaborative Multimedia System. CoRR (2022)
Chunxu Tang, Beinan Wang, C. Y. Roger Chen, Huijun Wu
CWcollab: A Context-Aware Web-Based Collaborative Multimedia System. ICC (2021)
Jae Woong Chun, C. Y. Roger Chen
Transistor and pin reordering for leakage reduction in CMOS circuits. Microelectron. J. 53 (2016)
Jiani Xie, C. Y. Roger Chen
Lookup Table Based Discrete Gate Sizing for Delay Minimization with Modified Elmore Delay Model. ACM Great Lakes Symposium on VLSI (2015)
B. S. Deepaksubramanyan, C. Y. Roger Chen, Adrian Nunez
A tool to generate models based on behavioral IBIS models. MWSCAS (2012)
Veerapaneni Nagbhushan, C. Y. Roger Chen
Modeling and reduction of complex timing constraints in high performance digital circuits. ICCD (2008)
Veerapaneni Nagbhushan, C. Y. Roger Chen
Algorithms to simplify multi-clock/edge timing constraints. ICCD (2007)
Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen
A technique for selecting CMOS transistor orders. ICCD (2007)
Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen
An efficient gate delay model for VLSI design. ICCD (2007)
Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal
A novel ultra-fast heuristic for VLSI CAD steiner trees. ACM Great Lakes Symposium on VLSI (2003)
Bill Halpin, Naresh Sehgal, C. Y. Roger Chen
Detailed Placement with Net Length Constraints. IWSOC (2003)
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
Timing Driven Placement using Physical Net Constraints. DAC (2001)
Muhammad Naeem Ayyaz, Dikran S. Meliksetian, C. Y. Roger Chen
Partitionable multistage interconnection networks. Part 2: Task migration schemes. Telecommun. Syst. 13 (1) (2000)
Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal
A novel technique for sea of gates global routing. ACM Great Lakes Symposium on VLSI (2000)
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
A sensitivity based placer for standard cells. ACM Great Lakes Symposium on VLSI (2000)
Dikran S. Meliksetian, Frank Feng-Kuo Yu, C. Y. Roger Chen
Methodologies for Designing Video Servers. IEEE Trans. Multim. 2 (1) (2000)
Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian
Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology. Discret. Appl. Math. 90 (1-3) (1999)
Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal
Technique for Planning of Terminal Locations of Leaf Cells in Cell-Based Design with Routing Considerations. VLSI Design (1998)
Muhammad Naeem Ayyaz, Dikran S. Meliksetian, C. Y. Roger Chen
Partitionable multistage interconnection networks. Part 1: Dynamic subcube compaction. Telecommun. Syst. 10 (1) (1998)
Tacettin Kiprulu, Dikran S. Meliksetian, C. Y. Roger Chen
Smoothing Algorithms for the Delivery of Compressed Video. ICC (3) (1997)
Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian
Transistor Chaining in CMOS Leaf Cells of Planar Topology. Great Lakes Symposium on VLSI (1996)
Calvin J. A. Hsia, C. Y. Roger Chen
Synthesis of Asynchronous Circuits - Testing Unique Circuit Behavior of Signal Transition Graphs. ISCAS (1995)
C. Y. Roger Chen, Cliff Yungchin Hou
A pin permutation algorithm for improving over-the-cell channel routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (8) (1995)
Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian
Dual Eulerian Properties of Plane Multigraphs. SIAM J. Discret. Math. 8 (1) (1995)
C. Y. Roger Chen, Dikran S. Meliksetian, M. C. Chang, L. J. Liu
Design of a Multimedia Object-Oriented DBMS. Multim. Syst. 3 (5-6) (1995)
C. Y. Roger Chen, Georges A. Makhoul, Dikran S. Meliksetian
A queueing analysis of the performance of DQDB. IEEE/ACM Trans. Netw. 3 (6) (1995)
C. Y. Roger Chen, Shuo-Hsien Hsiao, Abdulaziz S. Almazyad
A new model for the performance evaluation of synchronous circuit switched multistage interconnection networks. IEEE/ACM Trans. Netw. 3 (6) (1995)
Arif Ghafoor, C. Y. Roger Chen
Special Issue on Multimedia Processing and Technology. J. Parallel Distributed Comput. 30 (2) (1995)
Qinghong Wu, C. Y. Roger Chen, Bradley S. Carlson
LILA: layout generation for iterative logic arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (11) (1995)
C. Y. Roger Chen, Cliff Yungchin Hou, Bradley S. Carlson
A preprocessor for improving channel routing hierarchical pin permutation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (7) (1995)
Muhammad K. Dhodhi, Imtiaz Ahmad, C. Y. Roger Chen
Synthesis of Application-Specific Multiprocessor Systems. EDAC-ETC-EUROASIC (1994)
Naresh Kumar Seghal, C. Y. Roger Chen, John M. Acken
A High Performance General Purpose Multi-Point Signal Router. ISCAS (1994)
Naresh Sehgal, C. Y. Roger Chen, John M. Acken
A gridless multi-layer area router. Great Lakes Symposium on VLSI (1994)
Qinghong Wu, C. Y. Roger Chen, John M. Acken
Efficent Boolean Matching Algorithm for Cell Libraries. ICCD (1994)
Mohammed Aloqeely, C. Y. Roger Chen
Sequencer-Based Data Path Synthesis of Regular Iterative Algorithms. DAC (1994)
C. Y. Roger Chen, Mohammed Aloqeely
A new technique for exploiting regularity in data path synthesis. EURO-DAC (1994)
C. Y. Roger Chen, Cliff Yungchin Hou, Uminder Singh
Optimal algorithms for bubble sort based non-Manhattan channel routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (5) (1994)
James V. Luciani, C. Y. Roger Chen
An analytical model for partially blocking finite-buffered switching networks. IEEE/ACM Trans. Netw. 2 (5) (1994)
Naresh Sehgal, C. Y. Roger Chen, John M. Acken
An object-oriented cell library manager. ICCAD (1994)
Shuo-Hsien Hsiao, C. Y. Roger Chen
Performance analysis of single-buffered multistage interconnection networks. IEEE Trans. Commun. 42 (9) (1994)
Kingsley C. Nwosu, C. Y. Roger Chen, P. Bruce Berra
Multimedia Object Modeling and Storage Allocation Strategies. J. Intell. Inf. Syst. 3 (3/4) (1994)
Abdulaziz S. Mazyad, C. Y. Roger Chen
Performance Evaluation of HIPPI Interconnection System Using a Camp-On Strategy. LCN (1994)
C. Y. Roger Chen, Kingsley C. Nwosu, P. Bruce Berra
Modeling and Storage Allocation Strategies for Homogeneous Parallel Access Storage Devices in Real Time Multimedia Information Processing. ICCI (1993)
C. Y. Roger Chen, Kingsley C. Nwosu, P. Bruce Berra
Multimedia object modelling and storage allocation strategies for heterogeneous parallel access storage devices in real time multimedia computing systems. COMPSAC (1993)
Dikran S. Meliksetian, C. Y. Roger Chen
Optimal Routing Algorithm and the Diameter of the Cube-Connected Cycles. IEEE Trans. Parallel Distributed Syst. 4 (10) (1993)
Bradley S. Carlson, C. Y. Roger Chen
Performance Enhancement of CMOS VLSI Circuits by Transistor Reordering. DAC (1993)
Shuo-Hsien Hsiao, C. Y. Roger Chen
A New Model for the Performance Evaluation of Synchronous Circuit Switched Multistage Interconnection Networks. IPPS (1993)
Dikran S. Meliksetian, C. Y. Roger Chen
A Markov-Modulated Bernoulli Process Approximation for the Analysis of Banyan Networks. SIGMETRICS (1993)
Shuo-Hsien Hsiao, C. Y. Roger Chen
Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy. IEEE Trans. Parallel Distributed Syst. 3 (5) (1992)
Dikran S. Meliksetian, C. Y. Roger Chen
Performance Analysis of Communications in Static Interconnection Networks. SIGMETRICS (1992)
Uminder Singh, C. Y. Roger Chen
From logic to symbolic layout for gate matrix. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (2) (1992)
Cliff Yungchin Hou, C. Y. Roger Chen
A Pin Permutation Algorithm for Improving Over-the-Cell Channel Routing. DAC (1992)
Imtiaz Ahmad, C. Y. Roger Chen
A heuristic for data path synthesis using multiport memories. Great Lakes Symposium on VLSI (1992)
Muhammad F. Mudawwar, C. Y. Roger Chen
The Signal Flow Model: A novel Data Driven Approach to Parallel Processing. ICPP (1) (1992)
P. Bruce Berra, C. Y. Roger Chen, Arif Ghafoor, Thomas D. C. Little
Issues in Networking and Data Management of Distributed Multimedia Systems. HPDC (1992)
Bradley S. Carlson, C. Y. Roger Chen, Uminder Singh
Optimal cell generation for dual independent layout styles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (6) (1991)
C. Y. Roger Chen, Michael Z. Moricz
A delay distribution methodology for the optimal systolic synthesis of linear recurrence algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (6) (1991)
C. Y. Roger Chen, Michael Z. Moricz
Datapath Scheduling for Two-Level Pipelining. DAC (1991)
Shuo-Hsien Hsiao, C. Y. Roger Chen
Performance analysis of single-buffered multistage interconnection networks. SPDP (1991)
Cliff Yungchin Hou, C. Y. Roger Chen
A Hierarchical Methodology to Improve Channel Routing by Pin Permutation. ICCAD (1991)
Thomas D. C. Little, C. Y. Roger Chen, C. S. Chang, P. Bruce Berra
Multimedia Synchronization. IEEE Data Eng. Bull. 14 (3) (1991)
Imtiaz Ahmad, C. Y. Roger Chen
Post-Processor for Data Path Synthesis Using Multiport Memories. ICCAD (1991)
Calvin J. A. Hsia, C. Y. Roger Chen
Permutation Capability of Multistage Interconnection Networks. ICPP (1) (1990)
Uminder Singh, C. Y. Roger Chen
A Transistor Reordering Technique for Gate Matrix Layout. DAC (1990)
P. Bruce Berra, C. Y. Roger Chen, Arif Ghafoor, Chin Chung Lin, Thomas D. C. Little, Donghoon Shin
Architecture for distributed multimedia database systems. Comput. Commun. 13 (4) (1990)
Dikran S. Meliksetian, C. Y. Roger Chen
Communication Aspects of the Cube Connected Cycles. ICPP (1) (1990)
C. Y. Roger Chen, Yeh-Ching Chung
Embedding Networks with Ring Connections in Hypercube Machines. ICPP (3) (1990)
Calvin J. A. Hsia, C. Y. Roger Chen
On a class of (2n-1)-stage rearrangeable interconnection networks. ICCD (1989)
C. Y. Roger Chen, Cliff Yungchin Hou
A new algorithm for CMOS gate matrix layout. ICCAD (1988)
C. Y. Roger Chen, Cliff Yungchin Hou
A new layout optimization methodology for CMOS complex gates. ICCAD (1988)
C. Y. Roger Chen
TOBOL - a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems. ICCL (1988)