Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology.
Bradley S. CarlsonC. Y. Roger ChenDikran S. MeliksetianPublished in: Discret. Appl. Math. (1999)
Keyphrases
- high speed
- low power
- circuit design
- arbitrary dimension
- power consumption
- low cost
- integrated circuit
- analog vlsi
- cellular automaton
- planar surfaces
- metal oxide semiconductor
- floating gate
- delay insensitive
- visual cortex
- neural network
- microscopy images
- power dissipation
- focal plane
- cmos technology
- cellular automata
- image sensor
- vlsi circuits
- topology preserving