Bradley S. Carlson

Publication Activity (10 Years)

Years Active: 1991-2001
Publications (10 Years): 0

Publications

Bradley S. Carlson
Principles vs. Practices in Undergraduate Microelectronic Systems Education. MSE (2001)
Hung-Jung Chen, Bradley S. Carlson
Power estimation for a submicron CMOS inverter driving a CRC interconnect load. ACM Great Lakes Symposium on VLSI (2000)
Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian
Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology. Discret. Appl. Math. 90 (1-3) (1999)
Yen-Fu Liu, Nai-Wei Lo, Murali Subbarao, Bradley S. Carlson
Parallel implementation of a unified approach to image focus and defocus analysis on the Parallel Virtual Machine. Visual Information Processing (1998)
Nai-Wei Lo, Bradley S. Carlson, D. L. Tao
Fault Tolerant Algorithms for Broadcasting on the Star Graph Network. IEEE Trans. Computers 46 (12) (1997)
Zhang Zhu, Bradley S. Carlson
Critical Voltage Transition Logic: An Ultrafast CMOS Logic Family. ICCD (1997)
Maciek Kormicki, Ausif Mahmood, Bradley S. Carlson
Parallel logic simulation on a network of workstations using parallel virtual machine. ACM Trans. Design Autom. Electr. Syst. 2 (2) (1997)
Bradley S. Carlson
A VLSI circuit design course for practitioners and researchers. MSE (1997)
Maciek Kormicki, Ausif Mahmood, Bradley S. Carlson
Parallel logic simulation on a network of workstations using PVM. SPDP (1996)
Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian
Transistor Chaining in CMOS Leaf Cells of Planar Topology. Great Lakes Symposium on VLSI (1996)
Yuan Hu, Bradley S. Carlson
A Unified Algorithm for the Estimation and Scheduling of Data Flow Graphs. J. Circuits Syst. Comput. 6 (3) (1996)
Bradley S. Carlson, Suh-Juch Lee
Delay optimization of digital CMOS VLSI circuits by transistor reordering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (10) (1995)
Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian
Dual Eulerian Properties of Plane Multigraphs. SIAM J. Discret. Math. 8 (1) (1995)
Harry Hollander, Bradley S. Carlson, Toby D. Bennett
Synthesis of SEU-tolerant ASICs using concurrent error correction. Great Lakes Symposium on VLSI (1995)
Qinghong Wu, C. Y. Roger Chen, Bradley S. Carlson
LILA: layout generation for iterative logic arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (11) (1995)
C. Y. Roger Chen, Cliff Yungchin Hou, Bradley S. Carlson
A preprocessor for improving channel routing hierarchical pin permutation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (7) (1995)
Yuan Hu, Bradley S. Carlson
A Unified Algorithm for Estimation and Scheduling in Data Path Synthesis. ISCAS (1994)
Yuan Hu, Bradley S. Carlson
Improved Lower Bounds for the Scheduling Optimization Problem. ISCAS (1994)
Bradley S. Carlson, C. Y. Roger Chen
Performance Enhancement of CMOS VLSI Circuits by Transistor Reordering. DAC (1993)
Yuan Hu, Ahmed Ghouse, Bradley S. Carlson
Lower Bounds on the Iteration Time and the Number of Resources for Functional Pipelined Data Flow Graphs. ICCD (1993)
Bradley S. Carlson, C. Y. Roger Chen, Uminder Singh
Optimal cell generation for dual independent layout styles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (6) (1991)