Transistor Chaining in CMOS Leaf Cells of Planar Topology.
Bradley S. CarlsonC. Y. Roger ChenDikran S. MeliksetianPublished in: Great Lakes Symposium on VLSI (1996)
Keyphrases
- high speed
- low power
- circuit design
- power dissipation
- metal oxide semiconductor
- low cost
- power consumption
- integrated circuit
- cmos technology
- single point
- analog vlsi
- planar surfaces
- real time
- curved surfaces
- small world
- power supply
- visual cortex
- focal plane
- microscope images
- ground plane
- vlsi circuits
- infrared
- tree leaves