Power estimation for a submicron CMOS inverter driving a CRC interconnect load.
Hung-Jung ChenBradley S. CarlsonPublished in: ACM Great Lakes Symposium on VLSI (2000)
Keyphrases
- power consumption
- power dissipation
- vlsi circuits
- low power
- high speed
- power reduction
- active power
- reactive power
- low voltage
- power management
- power electronics
- power system
- cmos technology
- low cost
- clock frequency
- single phase
- chip design
- load forecasting
- power supply
- load balancing
- parameter estimation
- electron beam
- digital signal processing
- mixed signal
- real time
- reactive power compensation
- estimation algorithm
- control algorithm
- delay insensitive
- output voltage