Brian T. Murray

Publication Activity (10 Years)

Years Active: 1988-2005
Publications (10 Years): 0

Publications

Nagarajan Kandasamy, John P. Hayes, Brian T. Murray
Time-Constrained Failure Diagnosis in Distributed Embedded Systems: Application to Actuator Diagnosis. IEEE Trans. Parallel Distributed Syst. 16 (3) (2005)
Nagarajan Kandasamy, John P. Hayes, Brian T. Murray
Dependable communication synthesis for distributed embedded systems. Reliab. Eng. Syst. Saf. 89 (1) (2005)
Rajesh Venkatasubramanian, John P. Hayes, Brian T. Murray
Low-Cost On-Line Fault Detection Using Control Flow Assertions. IOLTS (2003)
Nagarajan Kandasamy, John P. Hayes, Brian T. Murray
Dependable Communication Synthesis for Distributed Embedded Systems. SAFECOMP (2003)
Nagarajan Kandasamy, John P. Hayes, Brian T. Murray
Time-Constrained Failure Diagnosis in Distributed Embedded Systems. DSN (2002)
Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar
Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters. IEEE Trans. Very Large Scale Integr. Syst. 8 (5) (2000)
Barbara J. Czerny, Joseph G. D'Ambrosio, Brian T. Murray
Providing convincing evidence of safety in X-by-wire automotive systems. HASE (2000)
Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray
Deterministic Built-in Pattern Generation for Sequential Circuits. J. Electron. Test. 15 (1-2) (1999)
Nagarajan Kandasamy, John P. Hayes, Brian T. Murray
Tolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems. SRDS (1999)
Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar
Built-in Test Pattern Generation For High-Performance Cir cuits Using Twisted-Ring Counters. VTS (1999)
Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray
Huffman encoding of test sets for sequential circuits. IEEE Trans. Instrum. Meas. 47 (1) (1998)
Hussain Al-Asaad, Brian T. Murray, John P. Hayes
Online BIST for Embedded Systems. IEEE Des. Test Comput. 15 (4) (1998)
Hussain Al-Asaad, John P. Hayes, Brian T. Murray
Scalable Test Generators for High-Speed Datapath Circuits. J. Electron. Test. 12 (1-2) (1998)
Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray
Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets. VTS (1998)
Krishnendu Chakrabarty, Brian T. Murray, John P. Hayes
Optimal Zero-Aliasing Space Compaction of Test Responses. IEEE Trans. Computers 47 (11) (1998)
Krishnendu Chakrabarty, Brian T. Murray
Design of built-in test generator circuits using width compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (10) (1998)
Krishnendu Chakrabarty, Jian Liu, Minyao Zhu, Brian T. Murray
Test Width Compression for Built-In Self Testing. ITC (1997)
Brian T. Murray, John P. Hayes
Testing ICs: Getting to the Core of the Problem. Computer 29 (11) (1996)
Krishnendu Chakrabarty, Brian T. Murray, John P. Hayes
Optimal Space Compaction of Test Responses. ITC (1995)
Xiaobo Hu, Joseph G. D'Ambrosio, Brian T. Murray, Dah-Lain Tang
Codesign of architectures for automotive powertrain modules. IEEE Micro 14 (4) (1994)
Brian T. Murray, John P. Hayes
Test Propagation Through Modules and Circuits. ITC (1991)
Brian T. Murray, John P. Hayes
Hierarchical test generation using precomputed tests for modules. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (6) (1990)
Debashis Bhattacharya, Brian T. Murray, John P. Hayes
High-Level Test Generation for VLSI. Computer 22 (4) (1989)
Brian T. Murray, John P. Hayes
Hierarchical Test Generation Using Precomputed Tests for Modules. ITC (1988)