Hussain Al-Asaad

Publication Activity (10 Years)

Years Active: 1993-2024
Publications (10 Years): 3

Top Topics

Malware Detection

Fpga Technology

Hardware Designs

Top Venues

Publications

Alireza Abolhasani Zeraatkar, Parnian Shabani Kamran, Inderpreet Kaur, Nagabindu Ramu, Tyler Sheaves, Hussain Al-Asaad
On the Performance of Malware Detection Classifiers Using Hardware Performance Counters. SmartNets (2024)
Alireza Abolhasani Zeraatkar, Parnian Shabani Kamran, Hussain Al-Asaad
Advancements in Secure Computing: Exploring Automated Repair Debugging and Verification Techniques for Hardware Design. CCWC (2024)
Raihana Yarzada, Divya Singh, Hussain Al-Asaad
A Brief Survey of Fault Tolerant Techniques for Field Programmable Gate Arrays. CCWC (2022)
Calvin Chiem, Hussain Al-Asaad
A Comparison of NMOS to PMOS Starved Buffer Implementations for the Delay Line in a PWM DC-DC Converters. CDES (2010)
Hussain Al-Asaad
Time-Redundant Logic-Level Protection Mechanisms from Soft Errors in Digital Systems. CDES (2010)
Hussain Al-Asaad
Efficient techniques for reducing error latency in on-line periodic built-in self-test. IEEE Instrum. Meas. Mag. 13 (4) (2010)
Calvin Chiem, Hussain Al-Asaad
Low Power Methodologies and Challenges for PWM DC-DC Converters. CDES (2009)
Hussain Al-Asaad
Detection and Isolation of Faulty Processors in Multiprocessor Systems via TMR-Based Time Redundant Task Scheduling. CDES (2009)
Jorge Campos, Hussain Al-Asaad
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions. IEEE Trans. Very Large Scale Integr. Syst. 16 (11) (2008)
Ahmed Sayed, Hussain Al-Asaad
A New Statistical Approach for Glitch Estimation in Combinational Circuits. ISCAS (2007)
Hussain Al-Asaad
Efficient Global Fault Collapsing for Combinational Library Modules. CDES (2007)
Ahmed Sayed, Hussain Al-Asaad
Survey and Evaluation of Low-Power Flip-Flops. CDES (2006)
Jorge Campos, Hussain Al-Asaad
Circuit Profiling Mechanisms for High-Level {ATPG}. MTV (2006)
Jorge Campos, Hussain Al-Asaad
Search-Space Optimizations for High-Level ATPG. MTV (2005)
Hussain Al-Asaad
EGFC: An exact global fault collapsing tool for combinational circuits. Circuits, Signals, and Systems (2005)
Hussain Al-Asaad, Ganesh Valliappan, Lourdes Ramirez
A Novel Functional Testing and Verification Technique for Logic Circuits. CDES (2005)
Jorge Campos, Hussain Al-Asaad
MVP: a mutation-based validation paradigm. HLDVT (2005)
Hector Arteaga, Hussain Al-Asaad
On Increasing the Observability of Modern Microprocessors. CDES (2005)
Ahmed Sayed, Hussain Al-Asaad
Survey and Evaluation of Low-Power Full-Adder Cells. ESA/VLSI (2004)
Hector Arteaga, Hussain Al-Asaad
Approaches for Monitoring Vectors on Microprocessor Buses. ESA/VLSI (2004)
Jorge Campos, Hussain Al-Asaad
Mutation-based validation of high-level microprocessor implementations. HLDVT (2004)
Hussain Al-Asaad, Alireza Sarvi
Fault Tolerance for Multiprocessor Systems Via Time Redundant Task Scheduling. VLSI (2003)
Hussain Al-Asaad, John P. Hayes
ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits. VTS (2000)
Hussain Al-Asaad, John P. Hayes
Logic Design Validation via Simulation and Automatic Test Pattern Generation. J. Electron. Test. 16 (6) (2000)
Hussain Al-Asaad, Brian T. Murray, John P. Hayes
Online BIST for Embedded Systems. IEEE Des. Test Comput. 15 (4) (1998)
Hussain Al-Asaad, John P. Hayes, Brian T. Murray
Scalable Test Generators for High-Speed Datapath Circuits. J. Electron. Test. 12 (1-2) (1998)
David Van Campenhout, Hussain Al-Asaad, John P. Hayes, Trevor N. Mudge, Richard B. Brown
High-level design verification of microprocessors via error modeling. ACM Trans. Design Autom. Electr. Syst. 3 (4) (1998)
Hussain Al-Asaad, John P. Hayes
Design verification via simulation and automatic test pattern generation. ICCAD (1995)
Hussain Al-Asaad, Mankuan Michael Vai, James Feldman
Distributed Reconfiguration of Fault Tolerant VLSI Mulipipeline Arrays with Constant Interstage Path Lengths. ICCD (1994)
Hussain Al-Asaad, Edward C. Czeck
Concurrent error correction in iterative circuits by recomputing with partitioning and voting. VTS (1993)
Hussain Al-Asaad, Elias S. Manolakos
A Two-Phase Reconfiguration Strategy for Extracting Linear Arrays Out of Two-Dimensional Architectures. DFT (1993)