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Procedures for Identifying Undetectable and Redundant Faults In Synchronous Sequential Circuits.
Sudhakar M. Reddy
Irith Pomeranz
Nadir Z. Basturkmen
Xijiang Lin
Published in:
VTS (1999)
Keyphrases
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built in self test
fault models
high speed
fault diagnosis
model based diagnosis
sequential search
delay insensitive
digital circuits
logic circuits
test cases
integrated circuit
fault detection
sequential data
asynchronous communication
logic synthesis
multiple faults
genetic algorithm