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Vernier ring based pre-bond through silicon vias test in 3D ICs.
Tianming Ni
Mu Nie
Huaguo Liang
Jingchang Bian
Xiumin Xu
Xiangsheng Fang
Zhengfeng Huang
Xiaoqing Wen
Published in:
IEICE Electron. Express (2017)
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