Yen-Tai Lai

Publication Activity (10 Years)

Years Active: 1984-2016
Publications (10 Years): 2

Top Topics

Cmos Technology

Power Reduction

Rate Distortion Optimization

Top Venues

J. Circuits Syst. Comput.

ACM Trans. Embed. Comput. Syst.

IET Image Process.

Int. J. Circuit Theory Appl.

Publications

Chao-Feng Tseng, Yen-Tai Lai
Fast coding unit decision and mode selection for intra-frame coding in high-efficiency video coding. IET Image Process. 10 (3) (2016)
Chao-Feng Tseng, Yen-Tai Lai
A High-Throughput JPEG XR Encoder. J. Signal Process. Syst. 85 (2) (2016)
Hung-Yi Lin, Yen-Tai Lai
Design of a 1-GSample/s 9-b double sampling track-and-hold amplifier in BiCMOS technology. Int. J. Circuit Theory Appl. 42 (5) (2014)
Chi-Chou Kao, Yen-Tai Lai
Improved Time-Multiplexed FPGA Architecture and Algorithm for Minimizing Communication Cost Designs. J. Circuits Syst. Comput. 22 (5) (2013)
Tzu-Chiang Tai, Yen-Tai Lai
Power minimization for dynamically reconfigurable FPGA partitioning. ACM Trans. Embed. Comput. Syst. 12 (1s) (2013)
Hung-Yi Lin, Yen-Tai Lai
Design of Low Power Two-phase CMOS Buffer for Large capacitive loading Applications. J. Circuits Syst. Comput. 22 (2) (2013)
Chi-Chou Kao, Yen-Tai Lai, Chao-Feng Tseng
Laplacian-based H.264 intra-prediction mode decision. CHINACOM (2012)
Tzu-Chiang Tai, Yen-Tai Lai
A Performance-Oriented Algorithm with Consideration on Communication Cost for Dynamically Reconfigurable FPGA Partitioning. ACM Trans. Reconfigurable Technol. Syst. 4 (2) (2011)
Yen-Tai Lai, Hung-Yi Lin
A low distortion CMOS continuous-time common-mode feedback circuit. Int. J. Circuit Theory Appl. 39 (12) (2011)
Chi-Chou Kao, Yen-Tai Lai, Chia-Hui Lin
An efficient reflection invariance region-based image retrieval framework. Int. J. Imaging Syst. Technol. 20 (2) (2010)
Yen-Tai Lai, Chi-Chou Kao, Tzu-Chiang Tai, Wen-Chun Yeh
A Performance-Driven Rotational Invariant Image Retrieval System. J. Inf. Sci. Eng. 26 (6) (2010)
Yen-Tai Lai, Chia-Nan Yeh, Chi-Chou Kao
A Novel Digital Pixel Sensor System. ISCAS (2009)
Chia-Nan Yeh, Yen-Tai Lai
A novel flash analog-to-digital converter. ISCAS (2008)
Chia-Nan Yeh, Yen-Tai Lai
Low power readout control circuit for high resolution CMOS image sensor. ISCAS (2006)
Yen-Tai Lai, Yung-Chuan Jiang, Hong-Ming Chu
BDD decomposition for mixed CMOS/PTL logic circuit synthesis. ISCAS (6) (2005)
Yen-Tai Lai, Hsin-Ya Lai, Chia-Nan Yeh
Placement for the reconfigurable datapath architecture. ISCAS (2) (2005)
Chi-Chou Kao, Yen-Tai Lai
An efficient algorithm for finding the minimal-area FPGA technology mapping. ACM Trans. Design Autom. Electr. Syst. 10 (1) (2005)
Chi-Chou Kao, Yen-Tai Lai
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction. ASP-DAC (2004)
Chi-Chou Kao, Yen-Tai Lai
A technology mapping algorithm for heterogeneous FPGAs. ASP-DAC (2003)
Yen-Tai Lai, Stephen S.-T. Yau, Ping-Hua Chen
Design of the ordinary differential equation solver in the Yau filtering system. ACC (2002)
Lih-Yang Wang, Yen-Tai Lai
Graph-theory-based simplex algorithm for VLSI layout spacingproblems with multiple variable constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (8) (2001)
Chi-Chou Kao, Yen-Tai Lai
A routability and performance driven technology mapping algorithm for LUT based FPGA designs. ISCAS (1) (1999)
Yen-Tai Lai, Chi-Chou Kao, Wu-Chien Shieh
A quadratic programming method for interconnection crosstalk minimization. ISCAS (6) (1999)
Yen-Tai Lai, Ping-Tsung Wang
Hierarchical interconnection structures for field programmable gate arrays. IEEE Trans. Very Large Scale Integr. Syst. 5 (2) (1997)
Lih-Yang Wang, Yen-Tai Lai, Bin-Da Liu, Tin-Chung Chang
Performance-directed compaction for VLSI symbolic layouts. Comput. Aided Des. 27 (1) (1995)
Ping-Tsung Wang, Kun-Nen Chen, Yen-Tai Lai
A High Performance FPGA with Hierarchical Interconnection Structure. ISCAS (1994)
Lih-Yang Wang, Yen-Tai Lai, Bin-Da Liu, Ting-Chung Chang
A graph-based simplex algorithm for minimizing the layout size and the delay on timing critical paths. ICCAD (1993)
Lih-Yang Wang, Yen-Tai Lai, Bin-Da Liu, Tin-Chung Chang
Layout Compaction with Minimzed Delay Bound on Timing Critical Paths. ISCAS (1993)
Yen-Tai Lai, Sany M. Leinwand
A Theory of Rectangular Dual Graphs. Algorithmica 5 (4) (1990)
Yen-Tai Lai, Sany M. Leinwand
Algorithms for floorplan design via rectangular dualization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (12) (1988)
Sany M. Leinwand, Yen-Tai Lai
An algorithm for building rectangular floor-plans. DAC (1984)