Design of Low Power Two-phase CMOS Buffer for Large capacitive loading Applications.
Hung-Yi LinYen-Tai LaiPublished in: J. Circuits Syst. Comput. (2013)
Keyphrases
- low power
- single chip
- power consumption
- low cost
- cmos technology
- high speed
- vlsi architecture
- low power consumption
- power dissipation
- ultra low power
- logic circuits
- digital signal processing
- nm technology
- gate array
- mixed signal
- cmos image sensor
- power reduction
- vlsi circuits
- wireless transmission
- low voltage
- real time
- image sensor
- design process