Yang Guo

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 63

Top Topics

Convolutional Neural Networks

Matrix Multiplication

Top Venues

IEICE Electron. Express

CCF Trans. High Perform. Comput.

Publications

Rui Xu, Sheng Ma, Yang Guo, Dongsheng Li
A Survey of Design and Optimization for Systolic Array-based DNN Accelerators. ACM Comput. Surv. 56 (1) (2024)
Xu He, Yao Wang, Zhiyong Fu, Yipei Wang, Yang Guo
A General Layout Pattern Clustering Using Geometric Matching-based Clip Relocation and Lower-bound Aided Optimization. ACM Trans. Design Autom. Electr. Syst. 28 (6) (2023)
Zhenyu Wang, Ding Deng, Shen Hou, Yang Guo, Shaoqing Li
Design of three-factor secure and efficient authentication and key-sharing protocol for IoT devices. Comput. Commun. 203 (2023)
Xu He, Yao Wang, Chang Liu, Qiang Wu, Juan Luo, Yang Guo
A Soft-Error Mitigation Approach Using Pulse Quenching Enhancement at Detailed Placement for Combinational Circuits. ACM Trans. Design Autom. Electr. Syst. 28 (4) (2023)
Kai Lu, Yaohua Wang, Yang Guo, Chun Huang, Sheng Liu, Ruibo Wang, Jianbin Fang, Tao Tang, Zhaoyun Chen, Biwei Liu, Zhong Liu, Yuanwu Lei, Haiyan Sun
MT-3000: a heterogeneous multi-zone processor for HPC. CCF Trans. High Perform. Comput. 4 (2) (2022)
Rui Xu, Sheng Ma, Yaohua Wang, Yang Guo, Dongsheng Li, Yuran Qiao
Heterogeneous Systolic Array Architecture for Compact CNNs Hardware Accelerators. IEEE Trans. Parallel Distributed Syst. 33 (11) (2022)
Xi Chen, Qian-cheng Guo, Hengzhou Yuan, Yang Guo
A Single-Event Transient Radiation Hardened Low-Dropout Regulator for LC Voltage-Controlled Oscillator. Symmetry 14 (4) (2022)
Zhenyu Wang, Ding Deng, Yang Guo, Shaoqing Li
HCRO-LKSM: A Lightweight Key Sharing and Management Protocol Based on HCRO-PUF for IoT Devices. HPCC/DSS/SmartCity/DependSys (2022)
Rui Xu, Sheng Ma, Yaohua Wang, Xinhai Chen, Yang Guo
Configurable Multi-directional Systolic Array Architecture for Convolutional Neural Networks. ACM Trans. Archit. Code Optim. 18 (4) (2021)
Xi Chen, Qian-cheng Guo, Hengzhou Yuan, Zhenyu Wu, Yang Guo
Analysis of Single Events Effects on Supply-Regulated LC-Tank Voltage-Controlled Oscillator. ASICON (2021)
Jingtian Liu, Bin Liang, Jianjun Chen, Yaqing Chi, Li Yan, Yang Guo
Current mirror with charge dissipation transistor for analogue single-event transient mitigation in space application. IET Circuits Devices Syst. 15 (2) (2021)
Xuanyi Li, Chen Li, Yang Guo, Rachata Ausavarungnirun
Improving Inter-kernel Data Reuse With CTA-Page Coordination in GPGPU. ICCAD (2021)
Yaohua Wang, Chen Li, Chang Liu, Sheng Liu, Yuanwu Lei, Jian Zhang, Yang Zhang, Yang Guo
Advancing DSP into HPC, AI, and beyond: challenges, mechanisms, and future directions. CCF Trans. High Perform. Comput. 3 (1) (2021)
Shen Hou, Ding Deng, Zhenyu Wang, Jiahe Shi, Shaoqing Li, Yang Guo
A dynamically configurable LFSR-based PUF design against machine learning attacks. CCF Trans. High Perform. Comput. 3 (1) (2021)
Rui Xu, Sheng Ma, Yaohua Wang, Yang Guo
HeSA: Heterogeneous Systolic Array Architecture for Compact CNNs Hardware Accelerators. DATE (2021)
Jifeng He, Chenggang Wu, Huawei Li, Yang Guo, Tao Li
Editorial for the special issue on reliability and power efficiency for HPC. CCF Trans. High Perform. Comput. 3 (1) (2021)
Munan Ning, Cheng Bian, Dong Wei, Chenglang Yuan, Yaohua Wang, Yang Guo, Kai Ma, Yefeng Zheng
A New Bidirectional Unsupervised Domain Adaptation Segmentation Framework. CoRR (2021)
Munan Ning, Cheng Bian, Dong Wei, Shuang Yu, Chenglang Yuan, Yaohua Wang, Yang Guo, Kai Ma, Yefeng Zheng
A New Bidirectional Unsupervised Domain Adaptation Segmentation Framework. IPMI (2021)
Rui Xu, Sheng Ma, Yaohua Wang, Yang Guo
CMSA: Configurable Multi-directional Systolic Array for Convolutional Neural Networks. ICCD (2020)
Munan Ning, Kaiwei Zeng, Yang Guo, Yaohua Wang
Deviation based clustering for unsupervised person re-identification. Pattern Recognit. Lett. 135 (2020)
Munan Ning, Cheng Bian, Donghuan Lu, Hong-Yu Zhou, Shuang Yu, Chenglang Yuan, Yang Guo, Yaohua Wang, Kai Ma, Yefeng Zheng
A Macro-Micro Weakly-supervised Framework for AS-OCT Tissue Segmentation. CoRR (2020)
Ding Deng, Shen Hou, Zhenyu Wang, Yang Guo
Configurable Ring Oscillator PUF Using Hybrid Logic Gates. IEEE Access 8 (2020)
Yaohua Wang, Lois Orosa, Xiangjun Peng, Yang Guo, Saugata Ghose, Minesh Patel, Jeremie S. Kim, Juan Gómez-Luna, Mohammad Sadrosadati, Nika Mansouri-Ghiasi, Onur Mutlu
FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching. MICRO (2020)
Munan Ning, Cheng Bian, Donghuan Lu, Hong-Yu Zhou, Shuang Yu, Chenglang Yuan, Yang Guo, Yaohua Wang, Kai Ma, Yefeng Zheng
A Macro-Micro Weakly-Supervised Framework for AS-OCT Tissue Segmentation. MICCAI (5) (2020)
Ding Deng, Yaohua Wang, Yang Guo
Novel Design Strategy Toward A2 Trojan Detection Based on Built-In Acceleration Structure. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Kaiwei Zeng, Munan Ning, Yaohua Wang, Yang Guo
Hierarchical Clustering With Hard-Batch Triplet Loss for Person Re-Identification. CVPR (2020)
Yaohua Wang, Lois Orosa, Xiangjun Peng, Yang Guo, Saugata Ghose, Minesh Patel, Jeremie S. Kim, Juan Gómez-Luna, Mohammad Sadrosadati, Nika Mansouri-Ghiasi, Onur Mutlu
FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching. CoRR (2020)
Kaiwei Zeng, Munan Ning, Yaohua Wang, Yang Guo
Energy clustering for unsupervised person re-identification. Image Vis. Comput. 98 (2020)
Chen Li, Andrew Zigerelli, Jun Yang, Youtao Zhang, Sheng Ma, Yang Guo
A Dynamic and Proactive GPU Preemption Mechanism Using Checkpointing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (1) (2020)
Sheng Ma, Libo Huang, Yuanwu Lei, Yang Guo, Zhiying Wang
An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators. ISCAS (2019)
Lujie Zhang, Chang Liu, Long Zhang, Yang Guo
一种基于SAT求解器的组合电路重汇聚现象分析方法 (Reconvergence Phenomena Analysis Method in Combinational Circuits Based on SAT Solver). 计算机科学 46 (4) (2019)
Chen Li, Rachata Ausavarungnirun, Christopher J. Rossbach, Youtao Zhang, Onur Mutlu, Yang Guo, Jun Yang
A Framework for Memory Oversubscription Management in Graphics Processing Units. ASPLOS (2019)
Hengzhou Yuan, Yang Guo, Jianjun Chen, Yaqing Chi, Xi Chen, Bin Liang
28nm Fault-Tolerant Hardening-by-Design Frequency Divider for Reducing Soft Errors in Clock and Data Recovery. IEEE Access 7 (2019)
Sheng Ma, Yang Guo, Shenggang Chen, Libo Huang, Zhiying Wang
Improving the DRAM Access Efficiency for Matrix Multiplication on Multicore Accelerators. DATE (2019)
Sheng Ma, Zhong Liu, Shenggang Chen, Libo Huang, Yang Guo, Zhiying Wang, Meidi Zhang
Coordinated DMA: Improving the DRAM Access Efficiency for Matrix Multiplication. IEEE Trans. Parallel Distributed Syst. 30 (10) (2019)
Shen Hou, Yang Guo, Shaoqing Li, Ding Deng, Yan Lei
A lightweight and secure-enhanced Strong PUF design on FPGA. IEICE Electron. Express 16 (24) (2019)
Zicong Wang, Xiaowen Chen, Chen Li, Yang Guo, Man Liao, Zhong Liu
Load-Balanced Link Distribution in Mesh-Based Many-Core Systems. HPCC/SmartCity/DSS (2019)
Shen Hou, Yang Guo, Shaoqing Li
A Lightweight LFSR-Based Strong Physical Unclonable Function Design on FPGA. IEEE Access 7 (2019)
Chen Li, Jun Yang, Yifan Sun, Lingling Jin, Lingjie Xu, Zheng Cao, Pengfei Fan, David R. Kaeli, Sheng Ma, Yang Guo
Priority-Based PCIe Scheduling for Multi-Tenant Multi-GPU Systems. IEEE Comput. Archit. Lett. 18 (2) (2019)
Rui Xu, Sheng Ma, Wenwu Li, Yang Guo
Accelerating CNNs Using Optimized Scheduling Strategy. ICA3PP (3) (2018)
Chen Li, Andrew Zigerelli, Jun Yang, Yang Guo
PEP: proactive checkpointing for efficient preemption on GPUs. DAC (2018)
Long Zhang, WanXia Qu, Yinjia Huo, Yang Guo, Sikun Li
An SAT-Based Method to Multithreaded Program Verification for Mobile Crowdsourcing Networks. Wirel. Commun. Mob. Comput. 2018 (2018)
Rui Xu, Sheng Ma, Yang Guo
Performance Analysis of Different Convolution Algorithms in GPU Environment. NAS (2018)
Sheng Ma, Hongyi Lu, Libo Huang, Li Shen, Yang Guo, Zhiying Wang, Wenliang Xue
Adaptive VC Partitioning for NoCs in GPGPUs. ISCAS (2018)
Zicong Wang, Xiaowen Chen, Zhonghai Lu, Yang Guo
Cache Access Fairness in 3D Mesh-Based NUCA. IEEE Access 6 (2018)
Chang Liu, Long Zhang, Xu He, Yang Guo
Analysis of SET Reconvergence and Hardening in the Combinational Circuit Using a SAT-Based Method. IEEE Access 6 (2018)
Zicong Wang, Xiaowen Chen, Junyang Zhang, Yang Guo
VP-Router: On balancing the traffic load in on-chip networks. IEICE Electron. Express 15 (22) (2018)
Long Zhang, Wenyan Hu, WanXia Qu, Yang Guo, Sikun Li
A Formal Approach to Verify Parameterized Protocols in Mobile Cyber-Physical Systems. Mob. Inf. Syst. 2017 (2017)
Jia-wei Tan, Yang Guo, Jianjun Chen, Hengzhou Yuan, Xi Chen
A state recovery design against single-event transient in high-speed phase interpolation clock and data recovery circuit. ASICON (2017)
Zicong Wang, Xiaowen Chen, Chen Li, Yang Guo
Fairness-oriented switch allocation for networks-on-chip. SoCC (2017)
Hengzhou Yuan, Jianjun Chen, Bin Liang, Yang Guo
A radiation hardened low-noise voltage-controlled-oscillator using negative feedback based multipath- current-releasing technology. ASICON (2017)
Zicong Wang, Xiaowen Chen, Chen Li, Yang Guo
Fairness-Oriented and Location-Aware NUCA for Many-Core SoC. NOCS (2017)
Ding Deng, Yang Guo, Zhentao Li
A Parallel Test Application Method towards Power Reduction. J. Electron. Test. 33 (2) (2017)
Ding Deng, Xiaowen Chen, Yang Guo
A novel power-efficient IC test scheme. IEICE Electron. Express 14 (13) (2017)
Hengzhou Yuan, Jianjun Chen, Bin Liang, Yang Guo
A Radiation-Immune Low-Jitter High-Frequency PLL for SerDes. NCCET (2017)
Hengzhou Yuan, Yang Guo, Yao Liu, Bin Liang, Qian-cheng Guo, Jia-wei Tan
A low-jitter self-biased phase-locked loop for SerDes. ISOCC (2016)
Chen Li, Sheng Ma, Lu Wang, Zicong Wang, Xia Zhao, Yang Guo
DLL: A dynamic latency-aware load-balancing strategy in 2.5D NoC architecture. ICCD (2016)
Chen Li, Zicong Wang, Lu Wang, Sheng Ma, Yang Guo
Overcoming and Analyzing the Bottleneck of Interposer Network in 2.5D NoC Architecture. ACA (2016)
Tun Li, Jian Hu, Yang Guo, Sikun Li, QingPing Tan
Equivalence checking of scheduling in high-level synthesis. ISQED (2015)
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Shenggang Chen, Hu Chen, Man Liao
Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips. J. Softw. 10 (2) (2015)
Xiaowen Chen, Zhonghai Lu, Yang Li, Axel Jantsch, Xueqian Zhao, Shuming Chen, Yang Guo, Zonglin Liu, Jianzhuang Lu, Jianghua Wan, Shuwei Sun, Shenggang Chen, Hu Chen
Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs. ISVLSI (2015)
Chen Li, Sheng Ma, Shenggang Chen, Yang Guo, Peng Wang
Express Ring: a multi-layer and non-blocking NoC architecture. IEICE Electron. Express 12 (3) (2015)
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Shenggang Chen, Hu Chen
Performance Analysis of Homogeneous On-Chip Large-Scale Parallel Computing Architectures for Data-Parallel Applications. J. Electr. Comput. Eng. 2015 (2015)
Hengzhou Yuan, Yang Guo, Zhuo Ma
A 40nm/65nm process adaptive low jitter phase-locked loop. ISIC (2014)
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Hengzhu Liu
Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs. IEICE Electron. Express 11 (18) (2014)
Zonglin Liu, Sheng Ma, Yang Guo
An efficient floating-point multiplier for digital signal processors. IEICE Electron. Express 11 (6) (2014)
Tun Li, Yang Guo, Wanwei Liu, Chiyuan Ma
Efficient translation validation of high-level synthesis. ISQED (2013)
Tun Li, Dan Zhu, Sikun Li, Yang Guo
Application specified soft error failure rate analysis using sequential equivalence checking techniques. ASP-DAC (2013)
Tun Li, Yang Guo, Wanwei Liu, Mingsheng Tang
Translation validation of scheduling in high level synthesis. ACM Great Lakes Symposium on VLSI (2013)
Hengzhou Yuan, Zhuo Ma, Yang Guo
An adaptive multi-modulus frequency divider. ASICON (2013)
Yang Guo, WanXia Qu, Long Zhang, Weixia Xu
State space reduction in modeling checking parameterized cache coherence protocol by two-dimensional abstraction. J. Supercomput. 62 (2) (2012)
WanXia Qu, Tun Li, Yang Guo, Xiaodong Yang
Explicit Model Checking Based on Integer Pointer and Fibonacci Hash. ICYCS (2008)
Dan Zhu, Tun Li, Yang Guo, Sikun Li
2D Decomposition Sequential Equivalence Checking of System Level and RTL Descriptions. ISQED (2008)
Yang Guo, WanXia Qu, Tun Li, Sikun Li
Coverage Driven Test Generation Framework for RTL Functional Verification. CAD/Graphics (2007)
Tun Li, Yang Guo, Sikun Li, Wei Dong, Rangyu Deng
Experiences Teaching Functional Verification Techniques with Practical Designs. MSE (2007)
Tun Li, Sikun Li, Jinshan Yu, Yang Guo
A Novel Collaborative Verification Environment for SoC Co-Verification. CSCWD (2007)
Jinshan Yu, Tun Li, Yang Guo, QingPing Tan
Scheduling of Transactions Based on Extended Scheduling Timed Petri Nets for SoC System-Level Test-Case Generation. EUC (2006)
Tun Li, Yang Guo, GongJie Liu, Sikun Li
Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming. DSD (2005)
Tun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li
MA2TG: A Functional Test Program Generator for Microprocessor Verification. DSD (2005)
Tun Li, Yang Guo, Sikun Li, Dan Zhu
Applying Constraint Logic Programming to Predicate Abstraction of RTL Verilog Descriptions. MICAI (2005)
Tun Li, Dan Zhu, Lei Liang, Yang Guo, Sikun Li
Automatic functional test program generation for microprocessor verification. ASP-DAC (2005)
Tun Li, Yang Guo, Sikun Li, GongJie Liu
Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming. ATVA (2005)
Tun Li, Yang Guo, Sikun Li
Design and Implementation of a Parallel Verilog Simulator: PVSim. VLSI Design (2004)
Tun Li, Yang Guo, Sikun Li, Fujiang Ao, Gongjie Li
Parallel verilog simulation: architecture and circuit partition. ASP-DAC (2004)
Tun Li, Yang Guo, Sikun Li
Automatic Circuit Extractor for HDL Description Using Program Slicing. J. Comput. Sci. Technol. 19 (5) (2004)
Tun Li, Yang Guo, Sikun Li
Assertion-based automated functional vectors generation using constraint logic programming. ACM Great Lakes Symposium on VLSI (2004)
Tun Li, Yang Guo, Sikun Li
CLP Based Static Property Checking. ATVA (2004)
Tun Li, Yang Guo, Sikun Li
An Automatic Circuit Extractor for RTL Verification. Asian Test Symposium (2003)