Yuran Qiao

Publication Activity (10 Years)

Years Active: 2013-2022
Publications (10 Years): 7

Top Topics

Matrix Multiplication

Software Implementation

Hardware Architectures

Top Venues

Publications

Rui Xu, Sheng Ma, Yaohua Wang, Yang Guo, Dongsheng Li, Yuran Qiao
Heterogeneous Systolic Array Architecture for Compact CNNs Hardware Accelerators. IEEE Trans. Parallel Distributed Syst. 33 (11) (2022)
Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang
Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs. CoRR (2018)
You Huang, Junzhong Shen, Yuran Qiao, Mei Wen, Chunyuan Zhang
MALMM: A multi-array architecture for large-scale matrix multiplication on FPGA. IEICE Electron. Express 15 (10) (2018)
Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang
Towards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA. FPGA (2018)
Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang
Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs. ISCAS (2018)
Yuran Qiao, Junzhong Shen, Dafei Huang, Qianming Yang, Mei Wen, Chunyuan Zhang
Optimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA. NPC (2017)
Yuran Qiao, Junzhong Shen, Tao Xiao, Qianming Yang, Mei Wen, Chunyuan Zhang
FPGA-accelerated deep convolutional neural networks for high throughput and energy efficiency. Concurr. Comput. Pract. Exp. 29 (20) (2017)
Tao Xiao, Yuran Qiao, Junzhong Shen, Qianming Yang, Mei Wen
Unified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA. ICA3PP (1) (2015)
Dafei Huang, Mei Wen, Changqing Xun, Dong Chen, Xing Cai, Yuran Qiao, Nan Wu, Chunyuan Zhang
Automated Transformation of GPU-Specific OpenCL Kernels Targeting Performance Portability on Multi-Core/Many-Core CPUs. Euro-Par (2014)
Nan Wu, Yuran Qiao, Mei Wen, Chunyuan Zhang
ACF: Networks-on-Chip Deadlock Recovery with Accurate Detection and Elastic Credit. APPT (2013)