William H. Joyner Jr.

Publication Activity (10 Years)

Years Active: 1973-2008
Publications (10 Years): 0

Publications

William H. Joyner Jr., David C. Yeh
Guest Editors' Introduction: System IC Design Challenges beyond 32 nm. IEEE Des. Test Comput. 25 (4) (2008)
R. Iris Bahar, Dan W. Hammerstrom, Justin E. Harlow III, William H. Joyner Jr., Clifford Lau, Diana Marculescu, Alex Orailoglu, Massoud Pedram
Architectures for Silicon Nanoelectronics and Beyond. Computer 40 (1) (2007)
Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon
Were the good old days all that good?: EDA then and now. DAC (2004)
Ralph K. Cavin III, William H. Joyner Jr., Virginia C. Wiggins
A semiconductor industry perspective on future directions in ECE education. IEEE Trans. Educ. 46 (4) (2003)
Alan Allan, Don Edenfeld, William H. Joyner Jr., Andrew B. Kahng, Mike Rodgers, Yervant Zorian
2001 Technology Roadmap for Semiconductors. Computer 35 (1) (2002)
William H. Joyner Jr., Andrew B. Kahng
Guest Editor's Introduction: Roadmaps and Visions for Design and Test. IEEE Des. Test Comput. 18 (6) (2001)
John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
LSS: A system for production logic synthesis. IBM J. Res. Dev. 44 (1) (2000)
William H. Joyner Jr.
Design and Test: The Lost World. ICCD (1997)
William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen
Technology adaption in logic synthesis. DAC (1986)
Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman
Global Flow Analysis in Automatic Logic Design. IEEE Trans. Computers 35 (1) (1986)
John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi
Production logic synthesis. ACM Conference on Computer Science (1985)
John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
LSS: A System for Production Logic Synthesis. IBM J. Res. Dev. 28 (5) (1984)
Daniel Brand, William H. Joyner Jr.
Verification of HDLC. IEEE Trans. Commun. 30 (5) (1982)
John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan
Logic Synthesis Through Local Transformations. IBM J. Res. Dev. 25 (4) (1981)
John A. Darringer, William H. Joyner Jr.
A new look at logic synthesis. DAC (1980)
William C. Carter, William H. Joyner Jr., Daniel Brand
Symbolic simulation for correct machine design. DAC (1979)
William H. Joyner Jr., William C. Carter, Daniel Brand
Using Machine Descriptions in Program Verification. Jerusalem Conference on Information Technology (1978)
Daniel Brand, William H. Joyner Jr.
Verification of Protocols Using Symbolic Execution. Comput. Networks 2 (1978)
William C. Carter, William H. Joyner Jr., Daniel Brand
Microprogram verification considered necessary. AFIPS National Computer Conference (1978)
Alexander Birman, William H. Joyner Jr.
A Problem-Reduction Approach to Proving Simulation Between Programs. IEEE Trans. Software Eng. 2 (2) (1976)
William H. Joyner Jr., William C. Carter, George B. Leeman Jr.
Automated proofs of microprogram correctness. MICRO (1976)
William H. Joyner Jr.
Resolution Strategies as Decision Procedures. J. ACM 23 (3) (1976)
William H. Joyner Jr.
Automatic Theorem-Proving and the Decision Problem SWAT (1973)