Louise Trevillyan

Publication Activity (10 Years)

Years Active: 1980-2013
Publications (10 Years): 0

Top Topics

Piecewise Linear

Top Venues

Publications

Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri
Depth controlled symmetric function fanin tree restructure. ICCAD (2013)
Nancy Ying Zhou, Charles J. Alpert, Zhuo Li, Cliff N. Sze, Louise Trevillyan
Shedding Physical Synthesis Area Bloat. VLSI Design 2011 (2011)
Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho
Logical and physical restructuring of fan-in trees. ISPD (2010)
Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda
An Integrated Environment for Technology Closure of Deep-Submicron IC Designs. IEEE Des. Test Comput. 21 (1) (2004)
John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
LSS: A system for production logic synthesis. IBM J. Res. Dev. 44 (1) (2000)
John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo E. Téllez, Louise Trevillyan
EDA in IBM: past, present, and future. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (12) (2000)
Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan
Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system. IEEE Trans. Very Large Scale Integr. Syst. 5 (1) (1997)
Vijay S. Iyengar, Louise Trevillyan, Pradip Bose
Representative Traces for Processor Models with Infinite Cache. HPCA (1996)
C. Leonard Berman, Louise Trevillyan
Global flow optimization in automatic logic design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (5) (1991)
C. Leonard Berman, Louise Trevillyan
Functional comparison of logic designs for VLSI circuits. ICCAD (1989)
C. Leonard Berman, Louise Trevillyan
Improved logic optimization using global flow analysis. ICCAD (1988)
Louise Trevillyan
An Overview of Logic Synthesis Systems. DAC (1987)
William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen
Technology adaption in logic synthesis. DAC (1986)
Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman
Global Flow Analysis in Automatic Logic Design. IEEE Trans. Computers 35 (1) (1986)
John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi
Production logic synthesis. ACM Conference on Computer Science (1985)
John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
LSS: A System for Production Logic Synthesis. IBM J. Res. Dev. 28 (5) (1984)
John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan
Logic Synthesis Through Local Transformations. IBM J. Res. Dev. 25 (4) (1981)
Frances E. Allen, J. Lawrence Carter, Janet Fabri, Jeanne Ferrante, William H. Harrison, Paul G. Loewner, Louise Trevillyan
The Experimental Compiling System. IBM J. Res. Dev. 24 (6) (1980)