Sourajeet Roy

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 7

Top Topics

Statistical Analyses

Engineering Education

Nonlinear Regression

Top Venues

Publications

Suyash Kushwaha, Avirup Dasgupta, Sourajeet Roy, Rohit Sharma
Fast Multi-ANN Composite Models for Repeater Optimization in Presence of Parametric Uncertainty for on-Chip Hybrid Copper-Graphene Interconnects. IEEE Access 11 (2023)
Surila Guglani, K. M. Dimple, Sourajeet Roy, Rohit Sharma, Brajesh Kumar Kaushik
A Bilevel Multi-Fidelity Polynomial Chaos Approach for the Uncertainty Quantification of MWCNT Interconnect Networks With Variable Imperfect Contact Resistances. IEEE Access 10 (2022)
Surila Guglani, Avirup Dasgupta, Ming-Yen Kao, Chenming Hu, Sourajeet Roy
Artificial Neural Network Surrogate Models for Efficient Design Space Exploration of 14-nm FinFETs. DRC (2022)
Jyoti Patel, Shashank Banchhor, Surila Guglani, Avirup Dasgupta, Sourajeet Roy, Anand Bulusu, Sudeb Dasgupta
Design optimization Using Symmetric/Asymmetric Spacer for 14 nm Multi-Fin Tri-gate Fin-FET for Mid-Band 5G Applications. VLSID (2022)
Sonal Shreya, Surila Guglani, Brajesh Kumar Kaushik, Sourajeet Roy
Statistical Analysis of Temperature Variability on the Write Efficiency of Spin-Orbit Torque MRAM using Polynomial Chaos Metamodels. ISQED (2020)
Anthony A. Maciejewski, Thomas W. Chen, Zinta S. Byrne, Michael A. De Miranda, Laura B. Sample Mcmeeking, Branislav M. Notaros, Ali Pezeshki, Sourajeet Roy, Andrea M. Leland, Melissa D. Reese, Alma H. Rosales, Thomas J. Siller, Richard F. Toftness, Olivera Notaros
A Holistic Approach to Transforming Undergraduate Electrical Engineering Education. IEEE Access 5 (2017)
Majid Ahadi, Sourajeet Roy
Sparse Linear Regression (SPLINER) Approach for Efficient Multidimensional Uncertainty Quantification of High-Speed Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (10) (2016)
Sourajeet Roy, Anestis Dounavis
Efficient Delay and Crosstalk Modeling of RLC Interconnects Using Delay Algebraic Equations. IEEE Trans. Very Large Scale Integr. Syst. 19 (2) (2011)
Sourajeet Roy, Anestis Dounavis
Transient Simulation of Distributed Networks Using Delay Extraction Based Numerical Convolution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (3) (2011)
Sourajeet Roy, Anestis Dounavis
Closed-Form Delay and Crosstalk Models for RLC On-Chip Interconnects Using a Matrix Rational Approximation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (10) (2009)