Login / Signup
Closed-Form Delay and Crosstalk Models for RLC On-Chip Interconnects Using a Matrix Rational Approximation.
Sourajeet Roy
Anestis Dounavis
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2009)
Keyphrases
</>
closed form
exponential family
variational inference
probabilistic model
statistical models
iterative procedure
closed form solutions
power dissipation
multiscale
high speed
partition function