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Shiro Sakiyama
Publication Activity (10 Years)
Years Active: 1994-2015
Publications (10 Years): 1
Top Topics
Synthetic Aperture Radar
Speckle Noise
Signal Noise Ratio
Hd Video
Top Venues
ISSCC
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
IEEE J. Solid State Circuits
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Publications
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Takuji Miki
,
Takashi Morie
,
Kazuo Matsukawa
,
Yoji Bando
,
Takeshi Okumoto
,
Koji Obata
,
Shiro Sakiyama
,
Shiro Dosho
A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques.
IEEE J. Solid State Circuits
50 (6) (2015)
Takashi Morie
,
Takuji Miki
,
Kazuo Matsukawa
,
Yoji Bando
,
Takeshi Okumoto
,
Koji Obata
,
Shiro Sakiyama
,
Shiro Dosho
A 71dB-SNDR 50MS/s 4.2mW CMOS SAR ADC by SNR enhancement techniques utilizing noise.
ISSCC
(2013)
Koji Obata
,
Kazuo Matsukawa
,
Yosuke Mitani
,
Masao Takayama
,
Yusuke Tokunaga
,
Shiro Sakiyama
,
Shiro Dosho
A Low Distortion 3rd-Order Continuous-Time Delta-Sigma Modulator for a Worldwide Digital TV-Receiver.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2012)
Yusuke Tokunaga
,
Shiro Sakiyama
,
Akinori Matsumoto
,
Shiro Dosho
An On-Chip CMOS Relaxation Oscillator With Voltage Averaging Feedback.
IEEE J. Solid State Circuits
45 (6) (2010)
Kazuo Matsukawa
,
Yosuke Mitani
,
Masao Takayama
,
Koji Obata
,
Yusuke Tokunaga
,
Shiro Sakiyama
,
Shiro Dosho
-order Continuous Time Delta-Sigma Modulator with an Ultimate Low Power Tuning System for a Worldwide Digital TV-Receiver.
CICC
(2010)
Kazuo Matsukawa
,
Takashi Morie
,
Yusuke Tokunaga
,
Shiro Sakiyama
,
Yosuke Mitani
,
Masao Takayama
,
Takuji Miki
,
Akinori Matsumoto
,
Koji Obata
,
Shiro Dosho
Design methods for pipeline & delta-sigma A-to-D converters with convex optimization.
ASP-DAC
(2009)
Yusuke Tokunaga
,
Shiro Sakiyama
,
Akinori Matsumoto
,
Shiro Dosho
An on-chip CMOS relaxation oscillator with power averaging feedback using a reference proportional to supply voltage.
ISSCC
(2009)
Akinori Matsumoto
,
Shiro Sakiyama
,
Yusuke Tokunaga
,
Takashi Morie
,
Shiro Dosho
A Design Method and Developments of a Low-Power and High-Resolution Multiphase Generation System.
IEEE J. Solid State Circuits
43 (4) (2008)
Yusuke Tokunaga
,
Shiro Sakiyama
,
Shiro Dosho
,
Yasuyuki Doi
,
Makoto Hattori
9mW Wide-Range Duty-Cycle Correcting False-Lock-Free DLL with Fully Balanced Charge-Pump for DDR Interface.
ISSCC
(2006)
Shiro Dosho
,
Shiro Sakiyama
,
Noriaki Takeda
,
Yusuke Tokunaga
,
Takashi Morie
A PLL for a DVD-16 Write System with 63 Output Phases and 32ps Resolution.
ISSCC
(2006)
Masaya Sumita
,
Shiro Sakiyama
,
Masayoshi Kinoshita
,
Yuta Araki
,
Yuichiro Ikeda
,
Kohei Fukuoka
Mixed body bias techniques with fixed V/sub t/ and I/sub ds/ generation circuits.
IEEE J. Solid State Circuits
40 (1) (2005)
Susumu Maruno
,
Toshiyuki Kohda
,
Hiroyuki Nakahira
,
Shiro Sakiyama
,
Masakatsu Maruyama
Quantizer neuron model and neuroprocessor-named quantizer neuron chip.
IEEE J. Sel. Areas Commun.
12 (9) (1994)