An On-Chip CMOS Relaxation Oscillator With Voltage Averaging Feedback.
Yusuke TokunagaShiro SakiyamaAkinori MatsumotoShiro DoshoPublished in: IEEE J. Solid State Circuits (2010)
Keyphrases
- analog vlsi
- low voltage
- high speed
- cmos technology
- circuit design
- low cost
- power supply
- feedback loop
- cmos image sensor
- random access memory
- single chip
- low power
- image sensor
- focal plane
- chip design
- power system
- power consumption
- mixed signal
- relevance feedback
- wide dynamic range
- metal oxide semiconductor
- iterative algorithms
- high density
- nm technology
- power dissipation
- dynamic range
- ultra low power
- real time
- vlsi circuits
- user feedback
- probabilistic relaxation
- design considerations
- electric field
- solid state
- physical design
- vlsi implementation
- high voltage
- differential equations
- parallel processing
- steady state
- signal processing
- semidefinite