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Yosuke Mitani
Publication Activity (10 Years)
Years Active: 2004-2012
Publications (10 Years): 0
Top Topics
Tensor Analysis
Delta Sigma Modulators
Pairwise
Digital Tv
Top Venues
VLSIC
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
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Publications
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Koji Obata
,
Kazuo Matsukawa
,
Yosuke Mitani
,
Masao Takayama
,
Yusuke Tokunaga
,
Shiro Sakiyama
,
Shiro Dosho
A Low Distortion 3rd-Order Continuous-Time Delta-Sigma Modulator for a Worldwide Digital TV-Receiver.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2012)
Kazuo Matsukawa
,
Koji Obata
,
Yosuke Mitani
,
Shiro Dosho
A 10 MHz BW 50 fJ/conv. continuous time ΔΣ modulator with high-order single opamp integrator using optimization-based design method.
VLSIC
(2012)
Kazuo Matsukawa
,
Yosuke Mitani
,
Masao Takayama
,
Koji Obata
,
Shiro Dosho
,
Akira Matsuzawa
A Fifth-Order Continuous-Time Delta-Sigma Modulator With Single-Opamp Resonator.
IEEE J. Solid State Circuits
45 (4) (2010)
Kazuo Matsukawa
,
Yosuke Mitani
,
Masao Takayama
,
Koji Obata
,
Yusuke Tokunaga
,
Shiro Sakiyama
,
Shiro Dosho
-order Continuous Time Delta-Sigma Modulator with an Ultimate Low Power Tuning System for a Worldwide Digital TV-Receiver.
CICC
(2010)
Kazuo Matsukawa
,
Takashi Morie
,
Yusuke Tokunaga
,
Shiro Sakiyama
,
Yosuke Mitani
,
Masao Takayama
,
Takuji Miki
,
Akinori Matsumoto
,
Koji Obata
,
Shiro Dosho
Design methods for pipeline & delta-sigma A-to-D converters with convex optimization.
ASP-DAC
(2009)
Tetsuya Sueyoshi
,
Hiroshi Uchida
,
Hans Jürgen Mattausch
,
Tetsushi Koide
,
Yosuke Mitani
,
Tetsuo Hironaka
Compact 12-port multi-bank register file test-chip in 0.35µm CMOS for highly parallel processors.
ASP-DAC
(2004)