Shigeto Maegawa

Publication Activity (10 Years)

Years Active: 1997-2014
Publications (10 Years): 0

Top Topics

Latent Semantic Indexing

Top Venues

IEICE Trans. Electron.

Publications

Kenichi Hatasako, Tetsuya Nitta, Masami Hane, Shigeto Maegawa
Past and Future Technology for Mixed Signal LSI. IEICE Trans. Electron. (4) (2014)
Fukashi Morishita, Hideyuki Noda, Isamu Hayashi, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto
A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI. IEICE Trans. Electron. (4) (2007)
Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi, Shigeto Maegawa
Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation. IEICE Trans. Electron. (4) (2007)
Masayuki Kitamura, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Hiromi Notani, Akira Tada, Shigeto Maegawa
High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI. PATMOS (2006)
Mitsuo Usami, Akira Sato, Hisao Tanabe, Toshiaki Iwamatsu, Shigeto Maegawa, Yuzuru Ohji
An SOI-Based 7.5µm-Thick 0.15x0.15mm2 RFID Chip. ISSCC (2006)
Fukashi Morishita, Hideyuki Noda, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto
A capacitorless twin-transistor random access memory (TTRAM) on SOI. CICC (2005)
Ken'ichi Shimomura, Hiroki Shimano, Narumi Sakashita, Fumihiro Okuda, Toshiyuki Oashi, Yasuo Yamaguchi, Takahisa Eimori, Masahide Inuishi, Kazutami Arimoto, Shigeto Maegawa, Yasuo Inoue, Shinji Komori, Kazuo Kyuma
A 1-V 46-ns 16-Mb SOI-DRAM with body control technique. IEEE J. Solid State Circuits 32 (11) (1997)