Sanjay Parihar

Publication Activity (10 Years)

Years Active: 2014-2020
Publications (10 Years): 5

Top Topics

Design Principles

High Throughput

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Randy W. Mann, Meixiong Zhao, Oh Sung Kwon, Xi Cao, Sanjay Parihar, Muhammed Ahosan Ul Karim, Jack M. Higman, Joseph Versaggi, Rick Carter
Bias-Dependent Variation in FinFET SRAM. IEEE Trans. Very Large Scale Integr. Syst. 28 (5) (2020)
Gobinda Saha, Zhewei Jiang, Sanjay Parihar, Xi Cao, Jack M. Higman, Muhammed Ahosan Ul Karim
An Energy-Efficient and High Throughput in-Memory Computing Bit-Cell With Excellent Robustness Under Process Variations for Binary Neural Network. IEEE Access 8 (2020)
Randy W. Mann, Meixiong Zhao, Sanjay Parihar, Qun Gao, Ankur Arya, Carl Radens, Shesh Mani Pandey, Joseph Versaggi, Jack M. Higman, Rick Carter
An Extrinsic Device and Leakage Mechanism in Advanced Bulk FinFET SRAM. IEEE Trans. Very Large Scale Integr. Syst. 27 (8) (2019)
Srinivas Jallepalli, Ram Mooraka, Sanjay Parihar, Earl Hunter, Elie Maalouf
Rapid Assessment of Design Sensitivity to Process Excursions via Scaled Sigma Sampling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (6) (2016)
Srinivas Jallepalli, Ram Mooraka, Sanjay Parihar, Earl Hunter, Elie Maalouf
Employing Scaled Sigma Sampling for Efficient Estimation of Rare Event Probabilities in the Absence of Input Domain Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (6) (2016)
David Burnett, Sriram Balasubramanian, Vivek Joshi, Sanjay Parihar, Jack M. Higman, C. Weintraub
SRAM Vmax stability considerations. IRPS (2015)
David Burnett, Sanjay Parihar, Hema Ramamurthy, Sriram Balasubramanian
FinFET SRAM design challenges. ICICDT (2014)