Samuel Bayliss

Publication Activity (10 Years)

Years Active: 2006-2020
Publications (10 Years): 7

Top Topics

Ai Technologies

Top Venues

Publications

Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss, Kees A. Vissers, Vivek Sarkar
Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine. CoRR (2020)
Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss, Kees A. Vissers, Vivek Sarkar
Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine. HPEC (2020)
Junyi Liu, John Wickerson, Samuel Bayliss, George A. Constantinides
Polyhedral-Based Dynamic Loop Pipelining for High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (9) (2018)
Junyi Liu, John Wickerson, Samuel Bayliss, George A. Constantinides
Run fast when you can: Loop pipelining with uncertain and non-uniform memory dependencies. ACSSC (2017)
Nachiket Kapre, Samuel Bayliss
Survey of domain-specific languages for FPGA computing. FPL (2016)
Felix Winterstein, Kermin Fleming, Hsin-Jung Yang, Samuel Bayliss, George A. Constantinides
MATCHUP: Memory Abstractions for Heap Manipulating Programs. FPGA (2015)
Junyi Liu, Samuel Bayliss, George A. Constantinides
Offline Synthesis of Online Dependence Testing: Parametric Loop Pipelining for HLS. FCCM (2015)
Kan Shi, David Boland, Edward A. Stott, Samuel Bayliss, George A. Constantinides
Datapath Synthesis for Overclocking: Online Arithmetic for Latency-Accuracy Trade-offs. DAC (2014)
Eduardo Aguilar-Pelaez, Samuel Bayliss, Alex I. Smith, Felix Winterstein, Dan R. Ghica, David B. Thomas, George A. Constantinides
Compiling Higher Order Functional Programs to Composable Digital Hardware. FCCM (2014)
Felix Winterstein, Samuel Bayliss, George A. Constantinides
Separation Logic-Assisted Code Transformations for Efficient High-Level Synthesis. FCCM (2014)
Luca Gallo, Alessandro Cilardo, David B. Thomas, Samuel Bayliss, George A. Constantinides
Area implications of memory partitioning for high-level synthesis on FPGAs. FPL (2014)
Umar Ibrahim Minhas, Samuel Bayliss, George A. Constantinides
GPU vs FPGA: A Comparative Analysis for Non-standard Precision. ARC (2014)
Felix Winterstein, Samuel Bayliss, George A. Constantinides
High-level synthesis of dynamic data structures: A case study using Vivado HLS. FPT (2013)
Felix Winterstein, Samuel Bayliss, George A. Constantinides
FPGA-based K-means clustering using tree-based data structures. FPL (2013)
Xitong Gao, Samuel Bayliss, George A. Constantinides
SOAP: Structural optimization of arithmetic expressions for high-level synthesis. FPT (2013)
Samuel Bayliss, George A. Constantinides
Optimizing SDRAM bandwidth for custom FPGA loop accelerators. FPGA (2012)
Samuel Bayliss, George A. Constantinides
Analytical synthesis of bandwidth-efficient SDRAM address generators. Microprocess. Microsystems 36 (8) (2012)
Samuel Bayliss, George A. Constantinides
Application Specific Memory Access, Reuse and Reordering for SDRAM. ARC (2011)
Samuel Bayliss, Christos-Savvas Bouganis, George A. Constantinides, Wayne Luk
An FPGA implementation of the simplex algorithm. FPT (2006)