Roland Dobai

Publication Activity (10 Years)

Years Active: 2009-2019
Publications (10 Years): 5

Top Topics

Genetic Programming

Evolutionary Design

Abdominal Aortic Aneurysm

Software Modules

Top Venues

GECCO (Companion)

ACM Trans. Reconfigurable Technol. Syst.

Publications

Vojtech Mrazek, Lukás Sekanina, Roland Dobai, Marek Sýs, Petr Svenda
Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques. IEEE Trans. Very Large Scale Integr. Syst. 27 (12) (2019)
Jakub Husa, Roland Dobai
Designing bent boolean functions with parallelized linear genetic programming. GECCO (Companion) (2017)
Roland Dobai, Jan Korenek, Lukás Sekanina
Evolutionary design of hash function pairs for network filters. Appl. Soft Comput. 56 (2017)
Marek Kidon, Roland Dobai
Evolutionary design of hash functions for IP address hashing using genetic programming. CEC (2017)
Roland Dobai, Jan Korenek, Lukás Sekanina
Adaptive development of hash functions in FPGA-based network routers. SSCI (2016)
Roland Dobai, Jan Korenek
Evolution of Non-Cryptographic Hash Function Pairs for FPGA-Based Network Applications. SSCI (2015)
Roland Dobai, Lukás Sekanina
Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware. ACM Trans. Reconfigurable Technol. Syst. 8 (3) (2015)
Roland Dobai, Kyrre Glette, Jim Tørresen, Lukás Sekanina
Evolutionary digital circuit design with fast candidate solution establishment in field programmable gate arrays. ICES (2014)
Roland Dobai
Evolutionary on-line synthesis of hardware accelerators for software modules in reconfigurable embedded systems. FPL (2014)
Roland Dobai, Marcel Baláz
Compressed Skewed-Load Delay Test Generation Based on Evolution and Deterministic Initialization of Populations. Comput. Informatics 32 (2) (2013)
Roland Dobai, Lukás Sekanina
Towards evolvable systems based on the Xilinx Zynq platform. ICES (2013)
Roland Dobai, Lukás Sekanina
Image filter evolution on the Xilinx Zynq Platform. AHS (2013)
Roland Dobai, Marcel Baláz
SAT-based generation of compressed skewed-load tests for transition delay faults. Microprocess. Microsystems 37 (2) (2013)
Roland Dobai, Marcel Baláz
Genetic method for compressed skewed-load delay test generation. DDECS (2012)
Roland Dobai, Marcel Baláz, Mária Fischerová
Automated Generation of Built-In Self-Repair Architectures for Random Logic SoC Cores. DSD (2012)
Roland Dobai, Elena Gramatová
A novel automatic test pattern generator for asynchronous sequential digital circuits. Microelectron. J. 42 (3) (2011)
Roland Dobai, Marcel Baláz
SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults. DSD (2011)
Roland Dobai, Elena Gramatová
Deductive Fault Simulation Technique for Asynchronous Circuits. Comput. Informatics 29 (6) (2010)
Roland Dobai, Elena Gramatová
Test pattern generation for the combinational representation of asynchronous circuits. DDECS (2010)
Roland Dobai, Elena Gramatová
Deductive Fault Simulation for Asynchronous Sequential Circuits. DSD (2009)