Marcel Baláz

Publication Activity (10 Years)

Years Active: 2006-2022
Publications (10 Years): 11

Top Topics

Fault Diagnostic

Vlsi Architecture

Embedded Devices

Top Venues

Comput. Informatics

RADIOELEKTRONIKA

Publications

Ondrej Kachman, Jakub Findura, Marcel Baláz, Gábor Gyepes, Libor Majer, Marian Vojs
Intelligent Monitoring System for Universal Data Collection and Analysis. RADIOELEKTRONIKA (2022)
Ondrej Kachman, Marcel Baláz
Efficient Patch Module for Single-bank or Dual-bank Firmware Updates for Embedded Devices. DDECS (2020)
Ondrej Kachman, Marcel Baláz, Peter Malík
Universal framework for remote firmware updates of low-power devices. Comput. Commun. 139 (2019)
Stefan Kristofík, Marcel Baláz, Peter Malík
Hardware redundancy architecture based on reconfigurable logic blocks with persistent high reliability improvement. Microelectron. Reliab. 86 (2018)
Ondrej Kachman, Marcel Baláz
Firmware Update Manager: A remote firmware reprogramming tool for low-power devices. DDECS (2017)
Ondrej Kachman, Marcel Baláz
Configurable Reprogramming Methodology for Embedded Low-Power Devices. DoCEIS (2017)
Stefan Kristofík, Marcel Baláz
Built-in self-repair architecture generator for digital cores. DDECS (2016)
Ondrej Kachman, Marcel Baláz
Optimized differencing algorithm for firmware updates of low-power devices. DDECS (2016)
Ondrej Kachman, Marcel Baláz
Effective Over-the-Air Reprogramming for Low-Power Devices in Cyber-Physical Systems. DoCEIS (2016)
Stefan Kristofík, Marcel Baláz, Mária Fischerová
Generic Self Repair Architecture with On-Line Fault Diagnosis. DDECS (2015)
Marcel Baláz, Stefan Kristofík
Generic Self Repair Architecture with Multiple Fault Handling Capability. DSD (2015)
Marcel Baláz, Stefan Kristofík, Mária Fischerová
Generic built-in self-repair architectures for SoC logic cores. DDECS (2014)
Andrej Kincel, Marcel Baláz
Case study: BISR for a processor multiplier. DDECS (2014)
Roland Dobai, Marcel Baláz
Compressed Skewed-Load Delay Test Generation Based on Evolution and Deterministic Initialization of Populations. Comput. Informatics 32 (2) (2013)
Roland Dobai, Marcel Baláz
SAT-based generation of compressed skewed-load tests for transition delay faults. Microprocess. Microsystems 37 (2) (2013)
Andrej Kincel, Marcel Baláz
MBIST for LEON3 processor core cache. DDECS (2013)
Roland Dobai, Marcel Baláz
Genetic method for compressed skewed-load delay test generation. DDECS (2012)
Roland Dobai, Marcel Baláz, Mária Fischerová
Automated Generation of Built-In Self-Repair Architectures for Random Logic SoC Cores. DSD (2012)
Roland Dobai, Marcel Baláz
SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults. DSD (2011)
Peter Malík, Michal Ufnal, Arkadiusz W. Luczyk, Marcel Baláz, Witold A. Pleskacz
MDCT / IMDCT low power implementations in 90 nm CMOS technology for MP3 audio. DDECS (2009)
Peter Malík, Marcel Baláz, Martin Simlastík, Arkadiusz W. Luczyk, Witold A. Pleskacz
Various MDCT implementations in 0.35µm CMOS. DDECS (2008)
Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík
An Improved MDCT IP Core Generator with Architectural Model Simulation. DDECS (2007)
Martin Simlastík, Peter Malík, Tomás Pikula, Marcel Baláz
FPGA Implementation of a Fast MDCT Algorithm. DDECS (2006)
Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík
MDCT IP Core Generator with Architectural Model Simulation. VLSI-SoC (2006)